SBASAJ7A June   2022  – August 2022

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information 
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications 
    7. 6.7  Safety-Related Certifications 
    8. 6.8  Safety Limiting Values 
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics 
    11. 6.11 Timing Diagrams
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Reference Input
      3. 7.3.3 Isolation Channel Signal Transmission
      4. 7.3.4 Open-Drain Digital Output
        1. 7.3.4.1 Transparent Output Mode
        2. 7.3.4.2 Latch Output Mode
      5. 7.3.5 Power-Up and Power-Down Behavior
      6. 7.3.6 VDD1 Brownout and Power-Loss Behavior
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DC Link Overcurrent Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Application Curves
    4. 8.4 Best Design Practices
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1 Overview

The AMC22C11-Q1 is an isolated comparator with an open-drain output and optional latch function. The comparator compares the input voltage (VIN) against the VIT+ threshold that is adjustable from 20 mV to 2.7 V through an internally generated 100-μA reference current and a single external resistor. The open-drain output is actively pulled low when the input voltage (VIN) is higher than the reference value VREF. The behavior when VIN drops below the trip threshold is determined by the LATCH pin, as described in the Section 7.3.4 section.

Galvanic isolation between the high- and low-voltage side of the device is achieved by transmitting the comparator states across a SiO2-based, capacitive isolation barrier. This isolation barrier supports a high level of magnetic field immunity, as described in the ISO72x Digital Isolator Magnetic-Field Immunity application note. The digital modulation scheme used in the AMC22C11-Q1 to transmit data across the isolation barrier, and the isolation barrier characteristics, result in high reliability and common-mode transient immunity.