SLAS986D November 2014 – February 2018 AMC7836
ADC Conversion Mode Bit. This bit selects the ADC conversion mode.
0: Direct mode. The analog inputs specified in the ADC channel registers are converted sequentially one time. When one set of conversions is complete, the ADC is idle and waits for a new trigger.
1: Auto mode. The analog inputs specified in the AMC channel registers are converted sequentially and repeatedly. When one set of conversions is complete, the ADC multiplexer returns to the first channel and repeats the process. The ADC-UPDATE bit in register 0x0F must be used to initiate the transfer of the latest conversion data to the ADC Data registers.
ADC Conversion rate. See Table 20 to configure this setting.
ADC Reference Buffer bit. This bit must be set to 1 after device power-up to enable the internal reference buffer driving the ADC.
0: ADC reference buffer is disabled.
1: ADC reference buffer is enabled.
Reserved for factory use
|CONV-RATE[1:0]||Unipolar Channel Sample Time (µs)||Bipolar Channel Sample Time (µs)|