SLVSDU6D July   2017  – November 2019 ATL431LI , ATL432LI

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
  8. Typical Characteristics
  9. Parameter Measurement Information
    1. 9.1 Temperature Coefficient
    2. 9.2 Dynamic Impedance
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
    4. 10.4 Device Functional Modes
      1. 10.4.1 Open Loop (Comparator)
      2. 10.4.2 Closed Loop
  11. 11Applications and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Applications
      1. 11.2.1 Comparator With Integrated Reference
        1. 11.2.1.1 Design Requirements
        2. 11.2.1.2 Detailed Design Procedure
          1. 11.2.1.2.1 Basic Operation
            1. 11.2.1.2.1.1 Overdrive
          2. 11.2.1.2.2 Output Voltage and Logic Input Level
            1. 11.2.1.2.2.1 Input Resistance
        3. 11.2.1.3 Application Curve
      2. 11.2.2 Precision Constant Current Sink
        1. 11.2.2.1 Design Requirements
        2. 11.2.2.2 Detailed Design Procedure
          1. 11.2.2.2.1 Basic Operation
            1. 11.2.2.2.1.1 Output Current Range and Accuracy
          2. 11.2.2.2.2 Power Consumption
      3. 11.2.3 Shunt Regulator/Reference
        1. 11.2.3.1 Design Requirements
        2. 11.2.3.2 Detailed Design Procedure
          1. 11.2.3.2.1 Programming Output/Cathode Voltage
          2. 11.2.3.2.2 Total Accuracy
          3. 11.2.3.2.3 Stability
          4. 11.2.3.2.4 Start-Up Time
        3. 11.2.3.3 Application Curve
      4. 11.2.4 Isolated Flyback with Optocoupler
        1. 11.2.4.1 Design Requirements
          1. 11.2.4.1.1 Detailed Design Procedure
            1. 11.2.4.1.1.1 ATL431LI Biasing
            2. 11.2.4.1.1.2 Resistor Feedback Network
    3. 11.3 System Examples
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 SOT23-3 Layout Example
    3. 13.3 X2SON (DQN) Layout Example
    4. 13.4 Thermal Considerations
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Device Nomenclature
      2. 14.1.2 Related Documentation
    2. 14.2 Related Links
    3. 14.3 Receiving Notification of Documentation Updates
    4. 14.4 Community Resources
    5. 14.5 Trademarks
    6. 14.6 Electrostatic Discharge Caution
    7. 14.7 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

ATL431LI Biasing

Figure 29 shows the simplified version of the feedback network. The standby Iq of the system is dependent on two paths, ATL431LI biasing path and the resistor feedback path. With the given design requirements the total current through the feedback network cannot exceed 2mA.

The design goal is to take full advantage of the Imin to set the IKA of the ATL431LI. The benefit of the ATL431LI is its low Imin of 80 µA which allows the IKA to be lower at a full load condition compared to typical TL431LI devices. This helps lower the IKA at the no-load condition which is higher than the full load condition due to the dynamic changes in the IKA as the system load varies. The IKA at no-load, IOPTNL, is dependent the value of Rs which is the biasing resistor. Rs is very application specific and is dependent on variables such as optocoupler's CTR, voltage, and current at no-load and this can be seen on Equation 2. By using an optocoupler with a high CTR it is possible to lower IOPTNL to a value of 1.5 mA for a power loss of 30 mW.

Equation 2. ATL431LI ATL432LI eq_rs.gif