SLUSAN9A August   2011  – August 2015

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Power-on Reset
    7. 6.7 Data Flash Characteristics Over Recommended Operating Temperature and Supply Voltage
    8. 6.8 SMBus Timing Requirements
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Feature Set
        1. 7.3.1.1 Primary (1st Level) Safety Features
        2. 7.3.1.2 Secondary (2nd Level) Safety Features
        3. 7.3.1.3 Charge Control Features
        4. 7.3.1.4 Gas Gauging
        5. 7.3.1.5 Lifetime Data Logging Features
        6. 7.3.1.6 Authentication
      2. 7.3.2 Battery Parameter Measurements
        1. 7.3.2.1 Charge and Discharge Counting
        2. 7.3.2.2 Voltage
        3. 7.3.2.3 Current
        4. 7.3.2.4 Wake Function
        5. 7.3.2.5 Auto Calibration
        6. 7.3.2.6 Temperature
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Modes
    5. 7.5 Programming
      1. 7.5.1 Configuration
        1. 7.5.1.1 Oscillator Function
        2. 7.5.1.2 System Present Operation
      2. 7.5.2 Communications
        1. 7.5.2.1 SMBus On and Off State
      3. 7.5.3 SBS Commands
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choosing the Correct Chemistry
        2. 8.2.2.2 High-Current Path
        3. 8.2.2.3 Protection FETs
        4. 8.2.2.4 Lithium-Ion Cell Connections
        5. 8.2.2.5 Sense Resistor
        6. 8.2.2.6 ESD Mitigation
        7. 8.2.2.7 System Present
        8. 8.2.2.8 SMBus Communication
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors
      2. 10.1.2 ESD Spark Gap
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The bq20z655-R1 is a gas gauge with primary protection support, and that can be used with a 2-series to 4-series Li-Ion/Li Polymer battery pack. To implement and design a comprehensive set of parameters for a specific battery pack, users need the BQEV graphical user-interface tool installed on a PC during development. The firmware installed on the BQEV tool has default values for this product, which are summarized in the bq20z655 Technical Reference Manual (SLUU493). Using the tool, BQEV these default values can be changed to cater to specific application requirements during development once the system parameters, such as fault trigger thresholds for protection, enable/disable of certain features for operation, configuration of cells, chemistry that best matches the cell used, and more are known. This data is referred to as the golden image.

Typical Application

bq20z655-R1 Schematic.gif Figure 3. Application Schematic

Design Requirements

Table 3 shows the default settings for the main parameters. Use the BQEV tool to update the settings to meet the specific application or battery pack configuration requirements.

Table 3. Design Parameters

PARAMETER EXAMPLE VALUE
Cell configuration 4s1p (4 series with 1 parallel)
Design capacity 4400 mAH
Device chemistry 0100 (LION)
Cell overvoltage at standard temperature 4300 mV
Cell undervoltage 2200 mV
Cell Shutdown voltage 1750 mV
Overcurrent in CHARGE mode 6000 mA
Overcurrent in DISCHARGE mode –6000 mA
Short circuit in CHARGE mode 0.1 V/Rsense across SRP, SRN
Short circuit in DISCHARGE mode 0.1 V/Rsense across SRP, SRN
Safety overvoltage 4500 mV
Cell balancing Disabled
Internal and external temperature sensor External temperature sensor is used
Undertemperature charging 0°C
Undertemperature discharging 0°C
BROADCAST mode Disabled
Battery Trip Point (BTP) with active high interrupt Disabled

Detailed Design Procedure

Choosing the Correct Chemistry

For the Impedance Track™ algorithm to work properly, the exact chemistry of the lithium cells needs to be known and the correct .SENC file needs to be loaded.

If you are using the bqEASY design wizard, it asks you to choose the correct chemistry from a list of manufacturers and model numbers, or test for a compatible chemistry using a 4-point test.

NOTE

Success of the 4-point test is contingent on an accurate voltage calibration.

The process for updating the .SENC file is outlined in detail in the application report Updating Firmware With The bq20zxx and EVM.

High-Current Path

The high-current path begins at the PACK+ terminal of the battery pack. As charge current travels through the pack, it finds its way through protection FETs, a chemical fuse, the lithium-ion cells and cell connections, and the sense resistor, and then returns to the PACK– terminal. In addition, some components are placed across the PACK+ and PACK– terminals to reduce effects from electrostatic discharge.

Protection FETs

Select the N-channel charge and discharge FETs for a given application. Most portable battery applications are a good match for the CSD17308Q3. The TI CSD17308Q3 is a 47-A, 30-V device with Rds(on) of 8.2 mΩ when the gate drive voltage is 8 V.

If a precharge FET is used, R1 is calculated to limit the precharge current to the desired rate. Be sure to account for the power dissipation of the series resistor. The precharge current is limited to (VCHARGER – VBAT)/R1 and maximum power dissipation is (Vcharger – Vbat)2/R1.

The gates of all protection FETs are pulled to the source with a high-value resistor between the gate and source to ensure they are turned off if the gate drive is open.

Capacitors C1 and C2 help protect the FETs during an ESD event. Using two devices ensures normal operation if one becomes shorted. To have good ESD protection, the copper trace inductance of the capacitor leads must be designed to be as short and wide as possible. Ensure that the voltage rating of both C1 and C2 are adequate to hold off the applied voltage if one of the capacitors becomes shorted.

Lithium-Ion Cell Connections

The important part to remember about the cell connections is that high current flows through the top and bottom connections; therefore, the voltage sense leads at these points must be made with a Kelvin connection to avoid any errors due to a drop in the high-current copper trace. The location marked 4P in indicates the Kelvin connection of the most positive battery node.

Sense Resistor

As with the cell connections, the quality of the Kelvin connections at the sense resistor is critical. The sense resistor must have a temperature coefficient no greater than 50 ppm to minimize current measurement drift with temperature. Choose the value of the sense resistor to correspond to the available overcurrent and short circuit ranges of the bq20z655. Select the smallest value possible to minimize the negative voltage generated on the VSS nodes during a short circuit.

ESD Mitigation

A pair of series 0.1-μF ceramic capacitors is placed across the PACK+ and PACK– terminals to help in the mitigation of external electrostatic discharges. The two devices in series ensure continued operation of the pack if one of the capacitors becomes shorted. Optionally, a tranzorb such as the SMBJ2A can be placed across the terminals to further improve ESD immunity.

System Present

The System Present signal is used to inform the gas gauge whether the pack is installed into or removed from the system. In the host system, this pin is grounded. The PRES pin of the bq20z655 is occasionally sampled to test for system present. To save power, an internal pullup is provided by the gas gauge during a brief 4-μs sampling pulse once per second. A resistor can be used to pull the signal low and the resistance must be 20 kΩ or lower to insure that the test pulse is lower than the VIL limit. The pullup current source is typically 10 μA to 20 μA.

Because the System Present signal is part of the pack connector interface to the outside world, it must be protected from external electrostatic discharge events. An integrated ESD protection on the PRES device pin reduces the external protection requirement to just R29 for an 8-kV ESD contact rating. However, if it is possible that the System Present signal may short to PACK+, then a resistor, diode combo must be included for high-voltage protection.

SMBus Communication

The SMBus clock and data pins have integrated high-voltage ESD protection circuits, however, adding a Zener diode and series resistor provides more robust ESD performance.

Application Curves

bq20z655-R1 D001_SLUSAN9.gif
Figure 4. Cell Voltage Error at 25°C
bq20z655-R1 D003_SLUSAN9.gif
Figure 6. TS1 Error vs Temperature
bq20z655-R1 D002_SLUSAN9.gif
Figure 5. Current vs Temperature