SLUSA75B July   2010  – January 2020 BQ24650

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Battery Voltage Regulation
      2. 8.3.2  Input Voltage Regulation
      3. 8.3.3  Battery Current Regulation
      4. 8.3.4  Battery Precharge
      5. 8.3.5  Charge Termination and Recharge
      6. 8.3.6  Power Up
      7. 8.3.7  Enable and Disable Charging
      8. 8.3.8  Automatic Internal Soft-Start Charger Current
      9. 8.3.9  Converter Operation
      10. 8.3.10 Synchronous and Non-Synchronous Operation
      11. 8.3.11 Cycle-by-Cycle Charge Undercurrent
      12. 8.3.12 Input Overvoltage Protection (ACOV)
      13. 8.3.13 Input Undervoltage Lockout (UVLO)
      14. 8.3.14 Battery Overvoltage Protection
      15. 8.3.15 Cycle-by-Cycle Charge Overcurrent Protection
      16. 8.3.16 Thermal Shutdown Protection
      17. 8.3.17 Temperature Qualification
      18. 8.3.18 Charge Enable
      19. 8.3.19 Inductor, Capacitor, and Sense Resistor Selection Guidelines
      20. 8.3.20 Charge Status Outputs
      21. 8.3.21 Battery Detection
        1. 8.3.21.1 Example
    4. 8.4 Device Functional Modes
      1. 8.4.1 Converter Operation
      2. 8.4.2 Synchronous and Non-Synchronous Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Power MOSFETs Selection
        5. 9.2.2.5 Input Filter Design
        6. 9.2.2.6 MPPT Temperature Compensation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

RVA Package
16-Pin VQFN
Top View

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 VCC P IC power positive supply. Place a 1-μF ceramic capacitor from VCC to GND and place it as close as possible to IC. Place a 10-Ω resistor from input side to VCC pin to filter the noise.
2 MPPSET I Input voltage set point. Use a voltage divider from input source to GND to set voltage on MPPSET to 1.2 V. To disable charge, pull MPPSET below 75 mV.
3 STAT1 O Open-drain charge status output to indicate various charger operation. Connect to the cathode of LED with 10 kΩ to the pullup rail. LOW or LED light up indicates charge in progress. Otherwise stays HI or LED stays off. When any fault condition occurs, both STAT1 and STAT2 are HI, or both LEDs are off.
4 TS I Temperature qualification voltage input. Connect to a negative temperature coefficient thermistor. Program the hot and cold temperature window with a resistor divider from VREF to TS to GND. A 103AT-2 thermister is recommended.
5 STAT2 O Open-drain charge status output to indicate various charger operation. Connect to the cathode of LED with 10 kΩ to the pullup rail. LOW or LED light up indicates charge is complete. Otherwise, stays HI or LED stays off. When any fault condition occurs, both STAT1 and STAT2 are HI, or both LEDs are off.
6 VREF P 3.3-V reference voltage output. Place a 1-μF ceramic capacitor from VREF to GND pin close to the IC. This voltage could be used for programming voltage on TS and the pullup rail of STAT1 and STAT2.
7 TERM_EN I Charge termination enable. Pull TERM_EN to GND to disable charge termination. Pull TERM_EN to VREF to allow charge termination. TERM_EN must be terminated and cannot be left floating.
8 VFB I Charge voltage analog feedback adjustment. Connect the output of a resistor divider powered from the battery terminals to this node to adjust the output battery voltage regulation.
9 SRN I Charge current sense resistor, negative input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. An optional 0.1-μF ceramic capacitor is placed from SRN to GND for common-mode filtering.
10 SRP P/I Charge current sense resistor, positive input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. A 0.1-μF ceramic capacitor is placed from SRP to GND for common-mode filtering.
11 GND P Power ground. Ground connection for high-current power converter node. On PCB layout, connect directly to source of low-side power MOSFET, to ground connection of input and output capacitors of the charger. Only connect to GND through the thermal pad underneath the IC.
12 REGN P PWM low-side driver positive 6-V supply output. Connect a 1-μF ceramic capacitor from REGN to GND, close to the IC. Use to drive low-side driver and high-side driver bootstrap Schottky diode from REGN to BTST.
13 LODRV O PWM low-side driver output. Connect to the gate of the low-side N-channel power MOSFET with a short trace.
14 PH P Switching node, charge current output inductor connection. Connect the 0.1-μF bootstrap capacitor from PH to BTST.
15 HIDRV O PWM high-side driver output. Connect to the gate of the high-side N-channel power MOSFET with a short trace.
16 BTST P PWM high-side driver positive supply. Connect the 0.1-µF bootstrap capacitor from PH to BTST.
— Thermal Pad — Exposed pad beneath the IC. The thermal pad must always be soldered to the board and have the vias on the thermal pad plane star-connecting to GND and ground plane for high-current power converter. It also serves as a thermal pad to dissipate heat.