SLUSCK5 March   2017

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power-On-Reset (POR)
      2. 8.3.2  Device Power Up from Battery without Input Source
      3. 8.3.3  Power Up from Input Source
        1. 8.3.3.1 Power Up REGN Regulation
        2. 8.3.3.2 Poor Source Qualification
        3. 8.3.3.3 Input Source Type Detection
          1. 8.3.3.3.1 PSEL Pins Sets Input Current Limit in bq25601
        4. 8.3.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 8.3.3.5 Converter Power-Up
      4. 8.3.4  Boost Mode Operation From Battery
      5. 8.3.5  Host Mode and Standalone Power Management
        1. 8.3.5.1 Host Mode and Default Mode in bq25601
      6. 8.3.6  Power Path Management
      7. 8.3.7  Battery Charging Management
        1. 8.3.7.1  Autonomous Charging Cycle
        2. 8.3.7.2  Battery Charging Profile
        3. 8.3.7.3  Charging Termination
        4. 8.3.7.4  Thermistor Qualification
        5. 8.3.7.5  JEITA Guideline Compliance During Charging Mode
        6. 8.3.7.6  Boost Mode Thermistor Monitor during Battery Discharge Mode
        7. 8.3.7.7  Charging Safety Timer
        8. 8.3.7.8  Narrow VDC Architecture
        9. 8.3.7.9  Dynamic Power management
        10. 8.3.7.10 Supplement Mode
      8. 8.3.8  Shipping Mode and QON Pin
        1. 8.3.8.1 BATFET Disable Mode (Shipping Mode)
        2. 8.3.8.2 BATFET Enable (Exit Shipping Mode)
        3. 8.3.8.3 BATFET Full System Reset
        4. 8.3.8.4 QON Pin Operations
      9. 8.3.9  Status Outputs (PG, STAT, INT)
        1. 8.3.9.1 Power Good indicator (PG Pin and PG_STAT Bit)
        2. 8.3.9.2 Charging Status indicator (STAT)
        3. 8.3.9.3 Interrupt to Host (INT)
      10. 8.3.10 Protections
        1. 8.3.10.1 Voltage and Current Monitoring in Converter Operation
          1. 8.3.10.1.1 Voltage and Current Monitoring in Buck Mode
            1. 8.3.10.1.1.1 Input Overvoltage (ACOV)
            2. 8.3.10.1.1.2 System Overvoltage Protection (SYSOVP)
        2. 8.3.10.2 Voltage and Current Monitoring in Boost Mode
          1. 8.3.10.2.1 VBUS Soft Start
          2. 8.3.10.2.2 VBUS Output Protection
          3. 8.3.10.2.3 Boost Mode Overvoltage Protection
        3. 8.3.10.3 Thermal Regulation and Thermal Shutdown
          1. 8.3.10.3.1 Thermal Protection in Buck Mode
          2. 8.3.10.3.2 Thermal Protection in Boost Mode
        4. 8.3.10.4 Battery Protection
          1. 8.3.10.4.1 Battery overvoltage Protection (BATOVP)
          2. 8.3.10.4.2 Battery Over-Discharge Protection
          3. 8.3.10.4.3 System Over-Current Protection
      11. 8.3.11 Serial interface
        1. 8.3.11.1 Data Validity
        2. 8.3.11.2 START and STOP Conditions
        3. 8.3.11.3 Byte Format
        4. 8.3.11.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.11.5 Slave Address and Data Direction Bit
        6. 8.3.11.6 Single Read and Write
        7. 8.3.11.7 Multi-Read and Multi-Write
    4. 8.4 Register Maps
      1. 8.4.1  REG00
      2. 8.4.2  REG01
      3. 8.4.3  REG02
      4. 8.4.4  REG03
      5. 8.4.5  REG04
      6. 8.4.6  REG05
      7. 8.4.7  REG06
      8. 8.4.8  REG07
      9. 8.4.9  REG08
      10. 8.4.10 REG09
      11. 8.4.11 REG0A
      12. 8.4.12 REG0B
  9. Application and Implementation
    1. 9.1 Application information
    2. 9.2 Typical Application Diagram
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 inductor Selection
        2. 9.2.2.2 input Capacitor
        3. 9.2.2.3 Output Capacitor
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device and Documentation Support

Documentation Support

Related Links

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Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

Trademarks

E2E is a trademark of Texas Instruments.

WEBENCH is a registered trademark of Texas Instruments.

Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.