SLUSEG4B December 2022 ā February 2024 BQ25628 , BQ25629
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Beside a register reset by the watchdog timer in default mode, the register and the timer can be reset to the default value by writing the REG_RST bit to 1. The register bits, which can be reset by the REG_RST bit, are noted in the Register Map section. After the register reset, the REG_RST bit goes back from 1 to 0 automatically.