SLUSEB9B december   2020  ā€“ july 2023 BQ25672

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Description (continued)
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Device Power-On-Reset
      2. 8.3.2  PROG Pin Configuration
      3. 8.3.3  Device Power Up from Battery without Input Source
      4. 8.3.4  Device Power Up from Input Source
        1. 8.3.4.1 Power Up REGN LDO
        2. 8.3.4.2 Poor Source Qualification
        3. 8.3.4.3 ILIM_HIZ Pin
        4. 8.3.4.4 Default VINDPM Setting
        5. 8.3.4.5 Input Source Type Detection
          1. 8.3.4.5.1 D+/Dā€“ Detection Sets Input Current Limit
          2. 8.3.4.5.2 HVDCP Detection Procedure
          3. 8.3.4.5.3 Connector Fault Detection
      5. 8.3.5  Dual-Input Power Mux
        1. 8.3.5.1 VBUS Input Only
        2. 8.3.5.2 One ACFET-RBFET
        3. 8.3.5.3 Two ACFETs-RBFETs
      6. 8.3.6  Buck Converter Operation
        1. 8.3.6.1 Force Input Current Limit Detection
        2. 8.3.6.2 Input Current Optimizer (ICO)
        3. 8.3.6.3 Maximum Power Point Tracking for Small PV Panel
        4. 8.3.6.4 Pulse Frequency Modulation (PFM)
        5. 8.3.6.5 Device HIZ State
      7. 8.3.7  USB On-The-Go (OTG)
        1. 8.3.7.1 OTG Mode to Power External Devices
      8. 8.3.8  Power Path Management
        1. 8.3.8.1 Narrow Voltage DC Architecture
        2. 8.3.8.2 Dynamic Power Management
      9. 8.3.9  Battery Charging Management
        1. 8.3.9.1 Autonomous Charging Cycle
        2. 8.3.9.2 Battery Charging Profile
        3. 8.3.9.3 Charging Termination
        4. 8.3.9.4 Charging Safety Timer
        5. 8.3.9.5 Thermistor Qualification
          1. 8.3.9.5.1 JEITA Guideline Compliance in Charge Mode
          2. 8.3.9.5.2 Cold/Hot Temperature Window in OTG Mode
      10. 8.3.10 Integrated 16-Bit ADC for Monitoring
      11. 8.3.11 Status Outputs ( STAT, and INT)
        1. 8.3.11.1 Charging Status Indicator (STAT Pin)
        2. 8.3.11.2 Interrupt to Host ( INT)
      12. 8.3.12 Ship FET Control
        1. 8.3.12.1 Shutdown Mode
        2. 8.3.12.2 Ship Mode
        3. 8.3.12.3 System Power Reset
      13. 8.3.13 Protections
        1. 8.3.13.1 Voltage and Current Monitoring
          1. 8.3.13.1.1  VAC Over-voltage Protection (VAC_OVP)
          2. 8.3.13.1.2  VBUS Over-voltage Protection (VBUS_OVP)
          3. 8.3.13.1.3  VBUS Under-voltage Protection (POORSRC)
          4. 8.3.13.1.4  System Over-voltage Protection (VSYS_OVP)
          5. 8.3.13.1.5  System Short Protection (VSYS_SHORT)
          6. 8.3.13.1.6  Battery Over-voltage Protection (VBAT_OVP)
          7. 8.3.13.1.7  Battery Over-current Protection (IBAT_OCP)
          8. 8.3.13.1.8  Input Over-current Protection (IBUS_OCP)
          9. 8.3.13.1.9  OTG Over-voltage Protection (OTG_OVP)
          10. 8.3.13.1.10 OTG Under-voltage Protection (OTG_UVP)
        2. 8.3.13.2 Thermal Regulation and Thermal Shutdown
      14. 8.3.14 Serial Interface
        1. 8.3.14.1 Data Validity
        2. 8.3.14.2 START and STOP Conditions
        3. 8.3.14.3 Byte Format
        4. 8.3.14.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.14.5 Target Address and Data Direction Bit
        6. 8.3.14.6 Single Write and Read
        7. 8.3.14.7 Multi-Write and Multi-Read
    4. 8.4 Device Functional Modes
      1. 8.4.1 Host Mode and Default Mode
      2. 8.4.2 Register Bit Reset
    5. 8.5 Register Map
      1. 8.5.1 I2C Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input (VBUS / PMID) Capacitor
        3. 9.2.2.3 Output (VSYS) Capacitor
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Two ACFETs-RBFETs

In this scenario, both ACFET1-RBFET1 and ACFET2-RBFET2 are present. VAC1 / VAC2 is tied to the drain of ACFET1 / ACFET2, ACDRV1 / ACDRV2 is connected to the gate of ACFET1 / ACFET2. This structure is developed to support dual-input connected at VA1 and VAC2.

GUID-EA3C000D-7500-4D33-B1CD-D04AD91FE5A9-low.gifFigure 8-4 Two ACFETs-RBFETs Structure Supporting One Input at VAC1 and One Input at VAC2

  • At POR, the charger detects both ACFET1-RBFET1 and ACFET2-RBFET2 presented, then updates ACRB1_STAT and ACRB2_STAT to 1.
  • EN_ACDRV1 and EN_ACDRV2 are programmable in this case.
  • The ACDRV turns on the ACFET-RBFET of the port with a valid input presented first. The other ACFET-RBFET stays off, even if there is an adapter being plugged in later.
  • Programming EN_ACDRV1 = 1, EN_ACDRV2 = 1 at the same time to turn on both ACFET1-RBFET1 and ACFET2-RBFET2 is not allowed, which will be ignored by the charger.
  • Assuming two valid voltages are presented at VAC1 and VAC2, ACFET1-RBFET1 turns on, connecting the input source at VAC1 to VBUS. If the voltage at VAC1 becomes invalid because of VAC_UVLO, VAC_OV or IBUS_OC, the charger swaps the input from VAC1 to VAC2, by turning off ACFET1-RBFET1 and then turning on ACFET2-RBFET2, without any host engagement. Swapping the input from VAC1 to VAC2 also can be controlled by the host. For example, to swap VAC1 to VAC2, the host can program REG0x13[7:6] (EN_ACDRV2, EN_ACDRV1) from 01b to 10b. The same control logic is applied to the input swapping from VAC2 to VAC1.

The waveforms below show the charger input transition from VAC1 to VAC2 when VAC1 is disconnected. At the beginning, VAC1 = 12V and VAC2 = 8V are both present. When VAC1 = 12V is gone, the charger accomplishes the input source auto transition from VAC1 to VAC2 without host control.

GUID-7CCE6C6C-76EF-425B-9D24-E28EAD1F9981-low.gifFigure 8-5 Input Source Auto Transition from VAC1 to VAC2 when VAC1 is Gone

When VAC2 has been connected, even if VAC1 is re-plugged in again later, the charger still stays connecting VAC2 as the input source, which is illustrated as the waveforms below. The host has to be involved to swap the input source from VAC2 back to VAC1 if necessary.

GUID-A95A0410-F243-4B66-B6EE-9314676D8F59-low.gifFigure 8-6 VAC1 Re-Plugged in When VAC2 Connected as the Charger Input

Some other critical notes for the application of this dual input power MUX are list below:

  • The register bits, EN_ACDRV1 and EN_ACDRV2, are not only to control the turning on / off of ACFETs-RBFETs but also to indicate the on / off status of the FETs.
  • The charger also provides the fault protection by turning ACFETs-RBFETs off, such as VAC_OVP and IBUS_OCP.
  • With only one valid input presented at either VAC1 or VAC2, the ACFET1-RBFET1 and ACFET2-RBFET2 can not be both turned off by setting REG0x13[7:6] = 00b, because the charger is always trying to connect the only one input voltage available to power the charger. At this condition, the host has to set DIS_ACDRV = 1 to force both two ACFETs-RBFETs off. With two input sources presented at both VAC1 and VAC2, the host can turn of the two ACFETs-RBFETs by setting either REG0x13[7:6] = 00 or DIS_ACDRV = 1.
  • In the transition from one input to the other one, after one ACFET-RBFET is turned off, the other one turns on until the VBUS voltage drops lower than VBUS_PRESENT. The converter stops switching for a short time period. When no battery presented or battery depleted, the system output would fall. The user has to be aware of this and avoid the input source swap when the battery voltage is too low.