SLUSDF9 June 2020 BQ25790
The internal bias circuits are powered from the higher voltage, whichever VVBUS or VBAT through an integrated power selector. The valid voltage to power up the device has to be greater than either VVBUS_UVLOZ or VBAT_UVLOZ thresholds. When VVBUS < VVBUS_UVLOZ, VBAT < VBAT_UVLOZ and a voltage higher than VAC_PRESENT is present at either VAC1 or VAC2, the device will be powered from VAC1 or VAC2, depending on which comes first.
Typically 5 ms after a valid voltage is first present at either VBAT, VBUS or VAC1 / VAC2, the charger wakes up, starts the ACFET-RBFET detection, reading the resistance at PROG pin, then configures the charger power on reset (POR) register setting accordingly. Approximately 20ms after input voltage presence, the I2C registers become accessible to the host.