8.5.1.3 REG03_Charge_Current_Limit Register (Offset = 3h) [reset = X]
REG03_Charge_Current_Limit is shown in Figure 41 and described in Table 12.
Return to the Summary Table.
Charge Current Limit
Figure 41. REG03_Charge_Current_Limit Register
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
RESERVED |
ICHG_8:0 |
R-0h |
R/W-X |
|
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
ICHG_8:0 |
R/W-X |
|
Table 12. REG03_Charge_Current_Limit Register Field Descriptions
Bit |
Field |
Type |
Reset |
Notes |
Description |
15-9 |
RESERVED |
R |
0h |
|
RESERVED |
8-0 |
ICHG_8:0 |
R/W |
X |
Reset by:
WATCHDOG
REG_RST
|
Charge Current Limit
During POR, the device reads the resistance tie to PROG pin, to identify the default battery cell count and determine the default power-on battery charging current:
1s and 2s: 2A
3s and 4s: 1A
Type : RW
Range : 50mA-5000mA
Fixed Offset : 0mA
Bit Step Size : 10mA
Clamped Low |