SLUSDV2A May 2020 – May 2021 BQ25798
The device deploys Narrow VDC architecture (NVDC) with BATFET separating system from battery. The minimum system voltage is set by VSYSMIN bits. Even with a fully depleted battery, the system is regulated above the minimum system voltage. The default minimum system voltage at POR is determined according to the PROG pin configuration resistor.
The NVDC architecture also provides charging termination when the battery is fully charged. By turning off the BATFET, the adapter power is prioritized to support the system, which avoids having the battery continuously charged and discharged by the system load even if the adapter is present. This is important for extending the battery life time.
When the battery voltage is below the minimum system voltage setting, the BATFET operates in linear mode (LDO mode), and the system is regulated at around 200 mV above the minimum system voltage setting. As the battery voltage rises above the minimum system voltage, the BATFET is fully on and the voltage difference between the system and battery is the RDS(ON) of the BATFET multiplied by the charging current. When battery charging is disabled and VBAT is above the minimum system voltage setting or charging is terminated, the system is always regulated at 200mV (typical, PWM switching) or 600mV (typical, PFM switching) above battery voltage. The status register VSYS_STAT bit goes high when the system is in minimum system voltage regulation.