SLUSDV2A May 2020 – May 2021 BQ25798
By utilizing the charger bidirectional buck-boost operation, BQ25798 supports the backup power supply mode. In this mode, the charger discharges the energy stored in the battery or the capacitors to hold the VBUS voltage for certain amount of time after the adapter is disconnected. The backup mode only can be enabled when VBUS is high, by setting EN_BACKUP = 1. When VBUS becomes low, the charger resets EN_BACKUP bit to 0.
A comparator is monitoring the VBUS voltage. Once the adapter is disconnected, and the VBUS drops lower than the pre-set threshold, the charger terminates the forward charging mode, forces EN_OTG = 1, starts discharging the battery or supercapacitor to regulate the VBUS voltage at the VOTG register setting. After the charger enters the backup mode, the VBUS_STAT[3:0] is changed to “In the backup OTG mode” status (VBUS_STAT[3:0] = 1100). At the same time, an INT pulse is asserted and the VBUS_FLAG is set to 1, if VBUS_MASK = 0.
The comparator thresholds monitoring VBUS to trigger backup mode are programmed in the VBUS_BACKUP[1:0] register bits, as a ratio of VINDPM values. The host is not able to write EN_OTG = 1 when VBUS is high. Only when EN_BACKUP = 1 and VBUS drops lower than the threshold, the charger itself forces EN_OTG = 1 to enter the backup mode.
The ACFET1-RBFET1 is required for the backup mode operation. Once the backup mode is triggered, the charger turns off the ACFET1-REFET1 by setting DIS_ACDRV = 1, to avoid back driving the adapter in the event when the adapter is still physically connected at VAC1. The ACFET1-RBFET1 also provides the charger input over-voltage (VAC_OVP) protection. When the input voltage is higher than the programmable VAC_OVP threshold (VAC_OVP[1:0]), the charger turns off the ACFET1-RBFET1, changes from forward charging mode to backup mode. If there is no ACFET1-RBFET1 detected at POR, the charger blocks backup mode from being enabled by forcing EN_BACKUP = 0.
If the charger is running in backup mode, either of the two conditions listed below can force the charger to exit the backup operation:
If there is an adapter reconnected while the charger is in backup mode, the user may transition the source which powers the PMID load from the battery back to the adapter. The following sequence is used to switch from the battery power back to ACIN1 while simultaneously re-arming the backup mode:
In a normal adapter attach sequence, the poor source detection is run, the ILIM pin is measured to set IINDPM and the VBUS is measured to set the VINDPM. In order to complete step 3 in the above sequence to re-arm the backup mode without allowing the power stage to be turned off, this sequence is skipped. This allows the converter to quickly transition back into backup mode if the adapter is unexpectedly removed during the sequence. This only occurs when EN_OTG is set to 0 while BKUP_ACFET1_ON = 1. If BKUP_ACFET1_ON = 0, or EN_OTG is already 0 when the adapter is attached, the charger powers up normally. It is generally recommended to allow 5 seconds of settling time before attempting to re-arm backup mode.
Because VBUS is not measured during the re-arming sequence, the VINDPM is not updated. In most applications, the device is expected to support a single adapter so that the previously-set VINDPM value is still accurate. For those applications where different adapter voltages are possible, the user can manually set the VINDPM value by measuring VBUS with the ADC before initiating the re-arming sequence, scaling the value and writing into the REG05_Input_Voltage_Limit Register.
In order to transition back to adapter power without dropping VBUS, but keep backup mode disarmed, the following sequence is used:
The simplified application diagram for the backup mode is shown as the figure below, in which the power flow is illustrated by the blue arrow.
The battery discharge current will be limited during backup mode if IBAT_REG[1:0] is set to 00, 01 or 10 (3A, 4A or 5A.) It is recommended to set IBAT_REG[1:0] = 11 (Disabled) when using backup mode in order to have optimal response. Depending on the loading at PMID, additional low ESR capacitance up to 200 μF may be necessary to prevent PMID dipping below the VINDPM set point.