SLUSDV2A May   2020  – May 2021 BQ25798

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Device Power-On-Reset
      2. 8.3.2  PROG Pin Configuration
      3. 8.3.3  Device Power Up from Battery without Input Source
      4. 8.3.4  Device Power Up from Input Source
        1. 8.3.4.1 Power Up REGN LDO
        2. 8.3.4.2 Poor Source Qualification
        3. 8.3.4.3 ILIM_HIZ Pin
        4. 8.3.4.4 Default VINDPM Setting
        5. 8.3.4.5 Input Source Type Detection
          1. 8.3.4.5.1 D+/D– Detection Sets Input Current Limit
          2. 8.3.4.5.2 HVDCP Detection Procedure
          3. 8.3.4.5.3 Connector Fault Detection
      5. 8.3.5  Dual-Input Power Mux
        1. 8.3.5.1 ACDRV Turn On Condition
        2. 8.3.5.2 VBUS Input Only
        3. 8.3.5.3 One ACFET-RBFET
        4. 8.3.5.4 Two ACFETs-RBFETs
      6. 8.3.6  Buck-Boost Converter Operation
        1. 8.3.6.1 Force Input Current Limit Detection
        2. 8.3.6.2 Input Current Optimizer (ICO)
        3. 8.3.6.3 Maximum Power Point Tracking for Small PV Panel
        4. 8.3.6.4 Pulse Frequency Modulation (PFM)
        5. 8.3.6.5 Device HIZ State
      7. 8.3.7  USB On-The-Go (OTG)
        1. 8.3.7.1 OTG Mode to Power External Devices
        2. 8.3.7.2 Backup Power Supply Mode
        3. 8.3.7.3 Backup Mode with Dual Input Mux
      8. 8.3.8  Power Path Management
        1. 8.3.8.1 Narrow VDC Architecture
        2. 8.3.8.2 Dynamic Power Management
      9. 8.3.9  Battery Charging Management
        1. 8.3.9.1 Autonomous Charging Cycle
        2. 8.3.9.2 Battery Charging Profile
        3. 8.3.9.3 Charging Termination
        4. 8.3.9.4 Charging Safety Timer
        5. 8.3.9.5 Thermistor Qualification
          1. 8.3.9.5.1 JEITA Guideline Compliance in Charge Mode
          2. 8.3.9.5.2 Cold/Hot Temperature Window in OTG Mode
      10. 8.3.10 Integrated 16-Bit ADC for Monitoring
      11. 8.3.11 Status Outputs ( STAT, and INT)
        1. 8.3.11.1 Charging Status Indicator (STAT Pin)
        2. 8.3.11.2 Interrupt to Host ( INT)
      12. 8.3.12 Ship FET Control
        1. 8.3.12.1 Shutdown Mode
        2. 8.3.12.2 Ship Mode
        3. 8.3.12.3 System Power Reset
      13. 8.3.13 Protections
        1. 8.3.13.1 Voltage and Current Monitoring
          1. 8.3.13.1.1  VAC Over-voltage Protection (VAC_OVP)
          2. 8.3.13.1.2  VBUS Over-voltage Protection (VBUS_OVP)
          3. 8.3.13.1.3  VBUS Under-voltage Protection (POORSRC)
          4. 8.3.13.1.4  System Over-voltage Protection (VSYS_OVP)
          5. 8.3.13.1.5  System Short Protection (VSYS_SHORT)
          6. 8.3.13.1.6  Battery Over-voltage Protection (VBAT_OVP)
          7. 8.3.13.1.7  Battery Over-current Protection (IBAT_OCP)
          8. 8.3.13.1.8  Input Over-current Protection (IBUS_OCP)
          9. 8.3.13.1.9  OTG Over-voltage Protection (OTG_OVP)
          10. 8.3.13.1.10 OTG Under-voltage Protection (OTG_UVP)
        2. 8.3.13.2 Thermal Regulation and Thermal Shutdown
      14. 8.3.14 Serial Interface
        1. 8.3.14.1 Data Validity
        2. 8.3.14.2 START and STOP Conditions
        3. 8.3.14.3 Byte Format
        4. 8.3.14.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.14.5 Slave Address and Data Direction Bit
        6. 8.3.14.6 Single Write and Read
        7. 8.3.14.7 Multi-Write and Multi-Read
    4. 8.4 Device Functional Modes
      1. 8.4.1 Host Mode and Default Mode
      2. 8.4.2 Register Bit Reset
    5. 8.5 Register Map
      1. 8.5.1 I2C Registers
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 PV Panel Selection
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Input (VBUS / PMID) Capacitor
        4. 9.2.2.4 Output (VSYS) Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application Curves

CVBUS = 2*10µF, CPMID= 3*10µF, CSYS = 5*10µF, CBAT = 2*10µF, L1 = 1µH (SPM6530T-1R0M120), Fsw = 1.5MHz.

GUID-0634BD6B-C255-4EA9-AFAF-FC578D05CA89-low.gif
VAC1 = VBUS = 5V VBAT = 8V
Figure 9-4 ACFET1-RBFET1 Turns on at Power Up
GUID-F1363B11-6956-448F-A1A7-36C3AA178FEF-low.gif
VBUS = 5V VBAT = 8V ICHG = 1A
Figure 9-6 Charge Enable
GUID-E6B89F9A-896A-44A5-A64C-224CC5305B30-low.gif
VBUS = 5V VBAT = 8V ICHG = 1A
Figure 9-8 Boost Charging Mode PWM Operation
GUID-EBB2CA47-C9C5-40C0-8FA9-83A956B00961-low.gif
VBUS = 15V VBAT = 8V ICHG = 1.5A
Figure 9-10 Buck Charging Mode PWM Operation
GUID-568AC4B5-45E3-4EEC-AD1D-C0C17C261A6B-low.gif
VBUS = 15VVBAT = 8VICHG = 0A
Figure 9-12 Buck Mode PFM without OOA
GUID-F4E873AC-6BD6-4EE1-AF58-D05D6D282782-low.gif
VBAT = 8VVOTG = 5VIBUS = 500mA
Figure 9-14 OTG Startup at 500-mA Load
GUID-FF9163C2-5497-4E28-9AF1-945E19E63B2C-low.gif
VBUS = 5V VBAT = 8V Charge enabled
Figure 9-16 IINDPM Transient Response
GUID-20210506-CA0I-6QVC-2BB3-X2J3QK0BRMTX-low.png
VOC = 10V VMPP = 8.1V VBAT = 8V
Figure 9-18 MPPT Operation
GUID-D38C51CE-A1E5-4345-A190-1EEE97442B00-low.gif
VAC1 = VBUS = 5V VBAT = 8V
Figure 9-5 Power Up from VAC1 with Charge Enabled
GUID-3EA87274-D477-4E6B-8203-F11F37A60D52-low.gif
VBUS = 5V VBAT = 8V ICHG = 1A
Figure 9-7 Charge Disable
GUID-6967C525-2265-4E84-8B97-A82B2E7DCCA3-low.gif
VBUS = 8V VBAT = 8V ICHG = 1A
Figure 9-9 Buck-Boost Charging Mode PWM Operation
GUID-FC46FD62-71BF-486F-A42A-21DF23B0FEF1-low.gif
VBUS = 15VVBAT = 8VICHG = 0A
Figure 9-11 Buck Mode PFM with OOA
GUID-7F0F6AE0-1AA5-48B7-AA36-A371D1278CD3-low.gif
VBAT = 8VVOTG = 5VIBUS = 0A
Figure 9-13 OTG Startup at No Load
GUID-B5F85D12-90BC-4424-AA09-77BC92192060-low.gif
VBUS = 15VVBAT = 8VCharge disabled
Figure 9-15 VSYS Load Transient Response
GUID-8D2FC71D-29BC-4EEF-9BAB-E724BC9F29FE-low.gif
VBAT = 8V VOTG = 5V
Figure 9-17 VOTG Load Transient Response
GUID-20210506-CA0I-9K9Q-XPZG-WDRFX1PVGVVQ-low.png
VOC = 10V VMPP = 8.1V VBAT = 8V
Figure 9-19 MPPT Operation Zoom