SLUSD88A March   2019  – June 2019 BQ25886

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Device Power-On-Reset
      2. 8.3.2  Device Power Up from Battery without Input Source
      3. 8.3.3  Device Power Up from Input Source
        1. 8.3.3.1 Poor Source Qualification
        2. 8.3.3.2 Input Source Type Detection
          1. 8.3.3.2.1 D+/D– Detection Sets Input Current Limit
        3. 8.3.3.3 Power Up REGN Regulator (LDO)
        4. 8.3.3.4 Converter Power Up
      4. 8.3.4  Input Current Optimizer (ICO)
      5. 8.3.5  Buck Mode Operation from Battery (OTG)
      6. 8.3.6  PowerPath Management
        1. 8.3.6.1 Narrow VDC Architecture
        2. 8.3.6.2 Dynamic Power Management
        3. 8.3.6.3 Supplement Mode
      7. 8.3.7  Battery Charging Management
        1. 8.3.7.1 Autonomous Charging Cycle
        2. 8.3.7.2 Battery Charging Profile
        3. 8.3.7.3 Charging Termination
        4. 8.3.7.4 Thermistor Qualification
          1. 8.3.7.4.1 JEITA Guideline Compliance in Charge Mode
        5. 8.3.7.5 Charging Safety Timer
      8. 8.3.8  Status Outputs
        1. 8.3.8.1 Power Good Indicator (PG)
        2. 8.3.8.2 Charging Status Indicator (STAT)
      9. 8.3.9  Input Current Limit on ILIM Pin
      10. 8.3.10 Voltage and Current Monitoring
        1. 8.3.10.1 Voltage and Current Monitoring in Boost Mode
          1. 8.3.10.1.1 Input Over-Voltage Protection
          2. 8.3.10.1.2 Input Under-Voltage Protection
          3. 8.3.10.1.3 System Over-Voltage Protection
          4. 8.3.10.1.4 System Over-Current Protection
        2. 8.3.10.2 Voltage and Current Monitoring in OTG Buck Mode
          1. 8.3.10.2.1 VBUS Over-voltage Protection
          2. 8.3.10.2.2 VBUS Over-Current Protection
      11. 8.3.11 Thermal Regulation and Thermal Shutdown
        1. 8.3.11.1 Thermal Protection in Boost Mode
        2. 8.3.11.2 Thermal Protection in OTG Buck Mode
      12. 8.3.12 Battery Protection
        1. 8.3.12.1 Battery Over-Voltage Protection (BATOVP)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input (VBUS / PMID) Capacitor
        3. 9.2.2.3 Output (VSYS) Capacitor
        4. 9.2.2.4 ILIM resistor
        5. 9.2.2.5 ICHGSET resistor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

VVBUS_UVLO_RISING< VVBUS < VVBUS_OV, TJ = -40°C to+125°C, and TJ = 25°C for typical values (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
QUIESCENT CURRENTS
IBAT Battery discharge current (BAT) VBAT = 9 V, No VBUS, SCL, SDA = 0 V or 1.8 V, TJ=25C, ADC Disabled 12 14 µA
VBAT = 9 V, No VBUS, SCL, SDA = 0 V or 1.8 V, TJ < 85C, ADC Disabled 12 20 µA
IVBUS_HIZ Input supply current (VBUS) in HIZ VBUS = 5 V, High-Z Mode, no battery, 25℃ 30 48 µA
VBUS = 5 V, High-Z Mode, no battery, <85℃ 30 55.2 µA
IVBUS Input supply current (VBUS) VBUS = 5 V, VBAT = 7.6 V, converter not switching 1.5 3 mA
VBUS = 5 V, VBAT = 7.6 V, converter switching, ISYS = 0A 3 mA
VBUS/VBAT POWER UP
VVBUS_OP VBUS operating range 4.3 6.2 V
VVBUS_UVLO_RISING VBUS rising, no battery VBUS rising 3.3 3.68 V
VVBUS_OV VBUS over-voltage rising threshold VBUS rising 6.2 6.6 V
VBUS over-voltage falling threshold VBUS falling 5.9 6.4 V
VPOORSRC_FALLING Bad adapter detection threshold VBUS falling below VPOORSRC_FALLING 3.7 V
IPOORSRC Bad adapter detection current source 15 mA
POWER-PATH
VSYS Typical System Regulation Voltage ISYS = 0A, VBAT = 8.80 V > SYS_MIN, Charge Disabled 100 mV
ISYS = 0A, VBAT < SYS_MIN, Charge Disabled 200 mV
VSYS_MIN System Regulation Voltage VBAT < SYS_MIN, Charge Disabled 6.2 6.4 V
BATTERY CHARGER
VREG_ACC Charge voltage RVSET < 18 kΩ, VREG = 8.20 V, TJ = -40℃ - 85℃ 8.159 8.2 8.241 V
VREG_ACC Charge voltage RVSET = 39 kΩ (±10%), VREG = 8.80 V, TJ = -40℃ - 85℃ 8.756 8.8 8.844 V
VREG_ACC Charge voltage RVSET = 75 kΩ (±10%), VREG = 8.70 V, TJ = -40℃ - 85℃ 8.656 8.7 8.744 V
VREG_ACC Charge voltage RSET > 150kΩ,VREG = 8.40 V, TJ = -40℃ to 85℃ 8.358 8.4 8.442 V
KICHGSET Charge current regulation setting ratio ICHG = RICHGSET/KICHGSET. ICHG = 1000 mA 3810 Ω/A
ICHG_RANGE Charge current regulation range 30 2200 mA
ICHG_ACC Fast Charge current regulation accuracy ICHG = 1000 mA, VBAT = 6.2 V or 7.6 V, TJ = 0°C to 85°C -7.5 7.5 %
ICHG_ACC Fast Charge current regulation accuracy ICHG = 500mA, VBAT = 6.2 V or 7.6 V, TJ = 0°C to 85°C -15 15 %
ICHG_ACC Fast Charge current regulation accuracy ICHG = 250 mA, VBAT = 6.2 V or 7.6 V, TJ = 0°C to 85°C -25 25 %
IPRECHG_RANGE Precharge current range 30 800 mA
IPRECHG_ACC Precharge current accuracy VBAT = 5.2 V, IPRECHG = 200 mA, TJ = 25°C 170 237 mA
VBAT = 5.2 V, IPRECHG = 200 mA, TJ = 0°C to 85°C 150 245 mA
ITERM_RANGE Termination current range 10 800 mA
ITERM_ACC Termination current accuracy ICHG = 1.5A, ITERM = 150 mA, TJ = 25°C 143 159 mA
ITERM_ACC ICHG = 1.5A, ITERM = 150 mA, TJ = 0°C to 85°C 120 180 mA
ITERM_ACC ICHG = 1.5A, ITERM = 50 mA, TJ = 25°C 42 60 mA
ITERM_ACC ICHG = 1.5A, ITERM = 50 mA, TJ = 0°C to 85°C 18 75 mA
VBAT_SHORT_RISING Short Battery Voltage rising threshold
to start pre-charging 		VBAT rising 4.1 4.4 4.7 V
VBAT_SHORT_FALLING Short Battery Voltage falling
threshold to stop pre-charging 		VBAT falling 3.7 4 4.3 V
IBAT_SHORT Low Battery Voltage trickle charging current VBAT < 4.4 V 100 mA
VBAT_LOWV_RISING VBAT LOWV Rising threshold to start fast-charging VBAT rising, VBATLOWV = 6.0 V 5.7 6 6.3 V
VBAT_LOWV_FALLING VBAT LOWV Falling threshold to stop fast-charging VBAT falling, VBATLOWV = 6.0 V 5.3 5.6 5.9 V
VRECHG Recharge threshold below VREG VBAT falling 200 mV
RON_QHS (Q2) High-side switching MOSFET on-resistance between SW and SYS (Q2) TJ =  25°C 32 35 mΩ
TJ = – 40°C to 125°C 32 47 mΩ
RON_QLS (Q3) Low-side switching MOSFET on-resistance between SW and GND (Q3) TJ = 25°C 42 46 mΩ
TJ = – 40°C to 125°C 42 63 mΩ
RON_QBAT (Q4) MOSFET on-resistance between SYS and BAT (Q4) TJ = 25°C 18 19 mΩ
RON_QBAT (Q4) MOSFET on-resistance between SYS and BAT (Q4) TJ = – 40°C - 85°C 18 23 mΩ
IBAT_DISCHG BAT Discharge current source VBAT = 8V, EN_BAT_DISCHG = 1 8 11.5 16 mA
INPUT VOLTAGE / CURRENT REGULATION
VINDPM Input voltage regulation range 4.171 4.3 4.429 V
KILIM IINMAX = KILIM/RILIM Input Current regulation by ILIM pin  1110 A x Ω
IINDPM Input current regulation limit, IINMAX = KILIM/RILIM Input Current regulation by ILIM pin = 0.5A 457 505 553 mA
Input Current regulation by ILIM pin = 0.9A 839 909 980 mA
Input Current regulation by ILIM pin = 1.5A 1413 1518 1624 mA
RON_QBLK (Q1) Blocking MOSFET on-resistance between VBUS and PMID (QBLK) TJ = 25°C 33 37 mΩ
TJ = – 40°C to 125°C 33 51 mΩ
D + /D- DETECTION
VD+D-_600MVSRC D+/D- Voltage Source (600 mV) 500 600 700 mV
ID+_10UASRC D+ Current Source (10 µA) 7 10 14 µA
ID+D-_100UASNK D+/D- Current Sink (100 µA) 50 100 150 µA
VD+D-_0P325 D+/D- Comparator Threshold for Secondary Detection 250 400 mV
RD-_19K D- Resistor to Ground (19 kΩ) 14.25 24.8 kΩ
VD+_0P8 D+ Comparator Threshold for Data Contact Detection 800 mV
VD+D-_1P2 D+/D- Threshold for  Non-standard adapter 1.05 1.35 V
VD+D-_2P0 D+/D- Comparator Threshold for  Non-standard adapter 1.85 2.15 V
VD+D-_2P8 D+/D- Threshold for  Non-standard adapter 2.55 2.85 V
ID+D-_LKG D+/D- Leakage Current HiZ -1 1 µA
BATTERY OVER-VOLTAGE PROTECTION
VBAT_OVP_RISING Battery over-voltage rising threshold VBAT rising, as percentage of VREG 102.5 104 105 %
VBAT_OVP_FALLING Battery over-voltage falling threshold VBAT falling, as percentage of VREG 101 102 103.3 %
THERMAL REGULATION AND THERMAL SHUTDOWN
TREG Junction temperature regulation accuracy TREG = 120°C 120 °C
TSHUT_RISING Thermal Shutdown Rising threshold Temperature Increasing 150 °C
Thermal Shutdown Falling threshold Temperature Decreasing 120 °C
JEITA THERMISTOR COMPARATOR (BOOST MODE)
VT1 TS pin voltage rising. T1 (0°C) threshold, Charge suspended below this temperature. As Percentage to REGN 72.75 73.25 73.75 %
VT1_HYS TS pin voltage falling. Charge re-enabled to ICHG/2 and VREG above this temperature As Percentage to REGN 1.3 %
VT2 TS pin voltage rising. T2 (10°C) threshold, charge set to ICHG/2 and VREG below this temperature As Percentage to REGN 67.75 68.25 68.75 %
VT2_HYS TS pin voltage falling. Charge set to ICHG and VREG above this temperature As Percentage to REGN 1.2 %
VT3 TS pin voltage falling. T3 (45°C) threshold, charge set to ICHG and 8.1 V above this temperature. As Percentage to REGN 44.25 44.75 45.25 %
VT3_HYS TS pin voltage rising. Charge set to ICHG and VREG below this temperature As Percentage to REGN 1 %
VT5 TS pin voltage falling. T5 (60°C) threshold, charge suspended above this temperature. As Percentage to REGN 33.875 34.375 34.875 %
VT5_HYS TS pin voltage rising. Charge set to ICHG and 8.1 V below this temperature As Percentage to REGN 1.35 %
COLD/HOT THERMISTOR COMPARATOR (OTG BUCK MODE)
VBCOLD0 Cold Temperature Threshold, TS pin Voltage Rising Threshold As Percentage to REGN (Approx. – 10°C w/ 103AT) 76.5 77 77.5 %
VBCOLD0_HYS Cold Temperature Threshold, TS pin Voltage Falling Threshold As Percentage to REGN 1 %
VBHOT1 Hot Temperature Threshold, TS pin Voltage falling Threshold As Percentage to REGN (Approx. 60°C w/ 103AT) 33.875 34.375 34.875 %
VBHOT1_HYS Hot Temperature Threshold, TS pin Voltage rising Threshold As Percentage to REGN 3 %
BOOST MODE CONVERTER
FSW PWM switching frequency Oscillator frequency 1.35 1.5 1.65 MHz
OTG BUCK MODE CONVERTER
VOTG_ACC OTG Buck mode voltage regulation accuracy IVBUS = 0A, OTG_VLIM = 5.1V 4.947 5.1 5.253 V
VOTG_ACC OTG Buck mode voltage regulation accuracy IVBUS = 0A, OTG_VLIM = 5.1 V -3 3 %
IOTG_ACC OTG Buck mode current regulation accuracy OTG_ILIM = 2A -15 -7.5 0 %
VOTG_OVP OTG Buck mode over-voltage threshold 5.8 6 V
REGN LDO
VREGN REGN LDO output voltage VVBUS = 5 V, IREGN = 20 mA 4.7 4.8 5.15 V
IREGN REGN LDO current limit VVBUS = 5 V, VREGN = 3.8 V 50 mA
LOGIC I/O PIN (/CE)
VIH_CEZ Input high threshold level, /CE 1.3 V
VIL_CEZ Input low threshold level, /CE 0.4 V
IIN_BIAS_CEZ High level leakage current, /CE Pull-up rail 1.8 V 2.5 uA
LOGIC O PIN (/INT, /PG, STAT)
VOL Output low threshold level Sink current = 5 mA 0.4 V
IOUT_BIAS High level leakage current Pull-up rail 1.8 V 1 µA