SLUSB20C November   2012  – November 2021

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Supply Current
    6. 7.6  Digital Input and Output DC Characteristics
    7. 7.7  Power-on Reset
    8. 7.8  2.5-V LDO Regulator
    9. 7.9  Internal Clock Oscillators
    10. 7.10 ADC (Temperature and Cell Measurement) Characteristics
    11. 7.11 Integrating ADC (Coulomb Counter) Characteristics
    12. 7.12 Data Flash Memory Characteristics
    13. 7.13 I2C-Compatible Interface Communication Timing Requirements
    14. 7.14 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Modes
        1. 8.4.1.1 BAT INSERT CHECK Mode
        2. 8.4.1.2 NORMAL Mode
        3. 8.4.1.3 SLEEP Mode
      2. 8.4.2 SLEEP+ Mode
      3. 8.4.3 HIBERNATE Mode
    5. 8.5 Programming
      1. 8.5.1 Standard Data Commands
      2. 8.5.2 Extended Data Commands
      3. 8.5.3 Communications
        1. 8.5.3.1 I2C Interface
        2. 8.5.3.2 I2C Time Out
        3. 8.5.3.3 I2C Command Waiting Time
        4. 8.5.3.4 I2C Clock Stretching
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 BAT Voltage Sense Input
        2. 9.2.2.2 SRP and SRN Current Sense Inputs
        3. 9.2.2.3 Sense Resistor Selection
        4. 9.2.2.4 TS Temperature Sense Input
        5. 9.2.2.5 Thermistor Selection
        6. 9.2.2.6 REGIN Power Supply Input Filtering
        7. 9.2.2.7 VCC LDO Output Filtering
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Sense Resistor Connections
      2. 11.1.2 Thermistor Connections
      3. 11.1.3 High-Current and Low-Current Path Separation
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-983A4BEE-6B2E-48E5-8CAC-8566FDDE18CE-low.gif Figure 6-1 YZF Package 15-Pin DSBGA
Table 6-1 Pin Functions
PIN TYPE1 DESCRIPTION
NAME NO.
BAT E2 I Cell-voltage measurement input. ADC input. Recommend 4.8 V maximum for conversion accuracy.
BAT_GD B2 O Battery Good push-pull indicator output. Active low and output disabled by default. Polarity is configured via Op Config [BATG_POL] and the output is enabled via OpConfig C [BATGSPUEN].
BAT_LOW C3 O Battery Low push-pull output indicator. Active high and output enabled by default. Polarity is configured via Op Config [BATL_POL] and the output is enabled via OpConfig C [BATLSPUEN].
BI/TOUT E3 IO Battery-insertion detection input. Power pin for pack thermistor network. Thermistor-multiplexer control pin. Use with pullup resistor >1 MΩ (1.8 MΩ, typical).
CE D2 I Chip Enable. Internal LDO is disconnected from REGIN when driven low.
Note: CE has an internal ESD protection diode connected to REGIN. Recommend maintaining VCE ≤ VREGIN under all conditions.
REGIN E1 P Regulator input. Decouple with 0.1-μF ceramic capacitor to VSS.
SCL A3 I Slave I2C serial communications clock input line for communication with system (Master). Open-drain IO. Use with 10-kΩ pullup resistor (typical).
SDA B3 IO Slave I2C serial communications data line for communication with system (Master). Open-drain IO. Use with 10-kΩ pullup resistor (typical).
SOC_INT A2 O SOC state interrupts output. Generates a pulse under the conditions specified in the BQ27520-G4 Technical Reference Manual. Open drain output.
SRN B1 IA Analog input pin connected to the internal coulomb counter with a Kelvin connection where SRN is nearest the VSS connection. Connect to 5-mΩ to 20-mΩ sense resistor.
SRP A1 IA Analog input pin connected to the internal coulomb counter with a Kelvin connection where SRP is nearest the PACK– connection. Connect to 5-mΩ to 20-mΩ sense resistor.
TS D3 IA Pack thermistor voltage sense (use 103AT-type thermistor). ADC input
VCC D1 P Regulator output and BQ27520-G4 processor power. Decouple with 1-μF ceramic capacitor to VSS.
VSS C1, C2 P Device ground
  1. IO = Digital input-output, IA = Analog input, P = Power connection