SLUSDH5B March   2019  – December 2022 BQ27Z561-R1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (cont.)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current
    6. 7.6  Internal 1.8-V LDO (REG18)
    7. 7.7  I/O (PULS, INT)
    8. 7.8  Chip Enable (CE)
    9. 7.9  Internal Temperature Sensor
    10. 7.10 NTC Thermistor Measurement Support
    11. 7.11 Coulomb Counter (CC)
    12. 7.12 Analog Digital Converter (ADC)
    13. 7.13 Internal Oscillator Specifications
    14. 7.14 Voltage Reference1 (REF1)
    15. 7.15 Voltage Reference2 (REF2)
    16. 7.16 Flash Memory
    17. 7.17 I2C I/O
    18. 7.18 I2C Timing — 100 kHz
    19. 7.19 I2C Timing — 400 kHz
    20. 7.20 HDQ Timing
    21. 7.21 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  BQ27Z561-R1 Processor
      2. 8.3.2  Battery Parameter Measurements
        1. 8.3.2.1 Coulomb Counter (CC)
        2. 8.3.2.2 CC Digital Filter
        3. 8.3.2.3 ADC Multiplexer
        4. 8.3.2.4 Analog-to-Digital Converter (ADC)
        5. 8.3.2.5 Internal Temperature Sensor
        6. 8.3.2.6 External Temperature Sensor Support
      3. 8.3.3  Power Supply Control
      4. 8.3.4  Bus Communication Interface
      5. 8.3.5  Low Frequency Oscillator
      6. 8.3.6  High Frequency Oscillator
      7. 8.3.7  1.8-V Low Dropout Regulator
      8. 8.3.8  Internal Voltage References
      9. 8.3.9  Gas Gauging
      10. 8.3.10 Charge Control Features
      11. 8.3.11 Authentication
    4. 8.4 Device Functional Modes
      1. 8.4.1 Lifetime Logging Features
      2. 8.4.2 Configuration
        1. 8.4.2.1 Coulomb Counting
        2. 8.4.2.2 Cell Voltage Measurements
        3. 8.4.2.3 Auto Calibration
        4. 8.4.2.4 Temperature Measurements
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements (Default)
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Changing Design Parameters
      3. 9.2.3 Calibration Process
      4. 9.2.4 Gauging Data Updates
        1. 9.2.4.1 Application Curve
  10. 10Power Supply Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Supports high-side and low-side current sense resistors down to 1 mΩ
  • Supports pack-side gauging including enhanced state of health (SOH) algorithm
  • Fast QMAX update option based on predicted OCV
  • SHA-256 authentication responder for increased battery pack security
  • Sophisticated charge algorithms:
    • JEITA
    • Enhanced charging
    • RSOC() charging compensation option
  • Two independent ADCs
    • Support for simultaneous current and voltage sampling
    • High-accuracy coulomb counter with input offset error < 1 µV (typical)
  • Low-voltage (2-V) operation
  • Wide-range current applications (1 mA to > 5 A)
  • Active high or low pulse or level interrupt pin
  • Supports battery trip point (BTP)
  • Reduced power modes (typical battery pack operating range conditions)
    • Typical SLEEP mode: < 11 μA
    • Typical DEEP SLEEP mode: < 9 μA
    • Typical OFF mode: < 1.9 μA
  • Internal and external temperature sense functions
  • Diagnostic lifetime data monitor and black box recorder
  • 400-kHz I2C bus communications interface for high-speed programming and data access
  • HDQ one-wire for communication with host
  • Compact 12-pin DSBGA package (YPH)