SLUSFQ0C November 2024 – September 2025 BQ27Z758
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
| PIN | DESCRIPTION | ||
|---|---|---|---|
| NAME | NO. | TYPE(1) | |
| CHG | A1 | AO | Charge FET (CHG) driver |
| DSG | A2 | AO | Discharge FET (DSG) driver. Connect a series 10MΩ typical resistor (RDSG) between DSG pin and PACK+ positive terminal. |
| PACK | A3 | AI | Pack input voltage sensing pin. Connect a series 5kΩ typical resistor (RPACK) between PACK pin and PACK+ positive terminal. |
| VDD | B1 | P | LDO regulator input. Connect a 1µF typical capacitor (CVDD) between VDD and VSS. Place the capacitor close to the gauge. |
| BAT | B2 | AI | Battery voltage measurement sense input |
| BAT_SP | B3 | AO | Cell sense output, positive |
| BAT_SN | C3 | AO | Cell sense output, negative |
| TS | C1 | AI | Thermistor input to ADC with internal 18kΩ pullup resistor |
| GPO/TS1 | C2 | I/O | General purpose output. Optional TS1 ADC input channel with internal 18kΩ pullup resistor |
| VSS | D1 | P | Device ground |
| ENAB | D2 | I | Active low digital input with weak internal pullup to VDD. If enabled for ultra-low power SHELF mode, driving this signal low will enable the device to wake up. |
| SDA | D3 | I/O | Digital input, open drain output for I2C serial data. Use with a typical 10kΩ pullup resistor. |
| SCL | E3 | I/O | Digital input, open drain output for I2C serial clock. Use with a typical 10kΩ pullup resistor. |
| SRP | E1 | AI | This is the positive analog input pin connected to the internal coulomb-counter peripheral for integrating a small voltage between SRP (positive side) and SRN (negative side). |
| SRN | E2 | AI | This is the negative analog input pin connected to the internal coulomb-counter peripheral for integrating a small voltage between SRP (positive side) and SRN (negative side). |