SLUSAS3C April 2014 – November 2017
The bq28z610 device has an I2C bus communication interface. This device has the option to broadcast information to a smart charger to provide key information to adjust the charging current and charging voltage based on the temperature or individual cell voltages.
If the device is configured as a single-master architecture (an application processor) and an occasional NACK is detected in the operation, the master can resend the transaction. However, in a multi-master architecture, an incorrect ACK leading to accidental loss of bus arbitration can cause a master to wait incorrectly for another master to clear the bus. If this master does not get a bus-free signal, then it must have in place a method to look for the bus and assume it is free after some period of time. Also, if possible, set the clock speed to be 100 kHz or less to significantly reduce the issue described above for multi-mode operation.