SLUSAS3C April 2014 – November 2017
The CC digital filter generates a 16-bit conversion value from the delta-sigma CC front-end. Its FIR filter uses the LFO clock output, which allows it to stop the HFO clock during conversions. New conversions are available every 250 ms while CCTL[CC_ON] = 1. Proper use of this peripheral requires turning on the CC modulator in the AFE.