The device powers up when VDD ≥ VPOR. At POR, the following events occur:
- A typical of 5-ms hold-off delay applies to both CHG and DSG drivers, keeping both drivers in the OFF state. This is to provide time for the internal LDO voltage to ramp up.
- The CTRC and CTRD deglitch occurs. During the deglitch time, the CHG and DSG driver remains off. Note that the deglitch time masks out the 5-ms hold-off delay.
- The device assumes an OV fault at POR; thus, the CHG driver is off for OV recovery time if all the cell voltages are < (VOV – VHYS_OV). The OV recovery time starts after the 5-ms hold-off delay. If device reset occurs when any cell voltage is above the OV hysteresis range, the CHG driver will remain off until an OV recovery condition is met.