SLUSCU0I March 2018 – September 2020 BQ77915
The CHG pin is driven high only when no related faults (OV, OW, OTC, UTC, OTD, UTD, OCD1, OCD2, SCD, OCC, and CTRC disabled) are present and the pack is not in HIBERNATE mode of operation. The CHG pin is used to drive the CHG FET, which is designed to be used on the single device configuration or used by the bottom device in a stack configuration.
Turning off the CHG pin has no influence on the overcurrent protection circuitry. The CHG pin is designed to turn on very quickly; the internal on resistance is about 2 kΩ. The CHG FET turn off relies on the external resistor connected in parallel to the gate-source nodes of the NCH power FET.
The CHG FET may be turned on to protect the FET's body diode if the pack is charging, even if a charging inhibit fault condition is present. This is done through the state comparator. The state comparator (with VSTATE_D threshold and VSTATE_D_HYS hysteresis) remains on for the entire duration of a DSG fault with no CHG fault event.
The CHGFET_OFF signal is a result of the presence of any related faults as shown in Figure 9-9.