SLUSCU0I March 2018 – September 2020 BQ77915
The load detection and removal detection features are implemented with the LD pin. When no undervoltage fault and current fault conditions are present, the LD pin is held in an open-drain state. Once any UV, OCD1, OCD2, OCC, or SCD fault occurs and load removal or detection is selected as device of the recovery conditions, a high impedance pulldown path to VSS is enabled on the LD pin. With an external load still present, the LD pin will be externally pulled high: It is internally clamped to VLDCLAMP and should also be resistor-limited through RLD externally to avoid conducting excessive current. If the LD pin voltage exceeds VLDT for tLD_DEG, it is interpreted as a load present condition and is one of the recovery mechanisms selectable for an OCC fault. When the load is eventually removed, the internal high-impedance path to VSS should be sufficient to pull the LD pin below VLDT for tLD_DEG. This is interpreted as a load removed condition and is one of the recovery mechanisms selectable for UV, OCD1, OCD2, and SCD faults.
|LD PIN||LOAD STATE|
|≥ VLDT for tLD_DEG||Load present|
|< VLDT for tLD_DEG||Load removed|