SLUSDQ4 April 2019 BQ79606A-Q1
PRODUCTION DATA.
ADC_DELAY Register Address: 0x27 | |||||||
B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 |
SPARE[2] | SPARE[1] | SPARE[0] | DLY[4] | DLY[3] | DLY[2] | DLY[1] | DLY[0] |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RW | RW | RW | RW | RW | RW | RW | RW |
SPARE[2:0] | Spare | ||||||
DLY[4:0] | Sets the delay from CONTROL2[CELL_ADCGO]=1 or CONTROL2[AUX_ADCGO]=1 to ADC conversion start. This is added to delay to the built-in time delays. ADC_DELAY[DLY] is used to synchronized voltage measurements to an external current measurement or to synchronize the small delays between the devices in the stack.
Programmable from 0us to 155us with 5us step size. |