Figure 7-11 Internal Schematic – CL Mode

Figure 7-12 CL Mode Frequency Response

The 330‑pF input series capacitor shown in Figure 7-11 splits the‑ input signal into low-frequency and high-frequency components. These signals are applied to In_Aux and IN, respectively. The IN pin controls the output of BUF802 through the Main Path, whereas the In_Aux pin controls the output through the Auxiliary Path.

The transfer function of the composite loop in CL Mode can be split into the following 3 frequency regions:

1. Low Frequency Region: The gain of the composite loop in the low-frequency region is α/β (determined by α and β network). In the low-frequency region the 330 pF input capacitor presents a high-impedance in the Main Path, causing the signal to flow through the precision amplifier and the In_Aux pin. This region spans from DC to f_LF. f_LF is the pole resulting from the gain bandwidth of the precision amplifier, the Auxiliary Path bandwidth, and parasitic capacitance of the components along the path.
2. High Frequency Region: In the high-frequency region, the precision amplifier and the Auxiliary Path run out of bandwidth. The net gain of the composite loop in this region is determined solely by the Main Path gain of the BUF802, which is denoted by G. This region spans from the pole created at f_HF till the LSBW of the BUF802. The f_HF is the pole resulting from the 330 pF series capacitor and the 10 MΩ resistor on the In_Bias pin.
3. Crossover Frequency Region: the Main Path and Auxiliary Path work in conjunction to determine the gain in the crossover region. To maintain a flat frequency response in this region, the following conditions have to be met:
   1. α/β = G
   2. High frequency response pole f_HF<< Low frequency pole f_LF
   A detailed analysis of discrete component selection to achieve a flat frequency response is discussed further in Section 8.1.