SWRS201C January 2017 – March 2025 CC2640R2F-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Icore | Core current consumption | Reset. RESET_N pin asserted or VDDS below power-on-reset (POR) threshold | 100 | nA | ||
| Shutdown. No clocks running, no retention | 150 | |||||
| Standby. With RTC, CPU, RAM and (partial) register retention. RCOSC_LF | 1.3 | µA | ||||
| Standby. With RTC, CPU, RAM and (partial) register retention. XOSC_LF | 1.5 | |||||
| Standby. With Cache, RTC, CPU, RAM and (partial) register retention. RCOSC_LF | 3.4 | |||||
| Standby. With Cache, RTC, CPU, RAM and (partial) register retention. XOSC_LF | 3.6 | |||||
| Idle. Supply Systems and RAM powered. | 650 | |||||
| Active. Core running CoreMark | 1.45mA + 31µA/MHz | |||||
| Radio RX | 6.1 | mA | ||||
| Radio TX, 0dBm output power | 7.0 | |||||
| Radio TX, 5dBm output power | 9.3 | |||||
| Peripheral Current Consumption (Adds to core current Icore for each peripheral unit activated)(1) | ||||||
| Iperi | Peripheral power domain | Delta current with domain enabled | 20 | µA | ||
| Serial power domain | Delta current with domain enabled | 13 | µA | |||
| RF Core | Delta current with power domain enabled, clock enabled, RF core idle | 237 | µA | |||
| µDMA | Delta current with clock enabled, module idle | 130 | µA | |||
| Timers | Delta current with clock enabled, module idle | 113 | µA | |||
| I2C | Delta current with clock enabled, module idle | 12 | µA | |||
| I2S | Delta current with clock enabled, module idle | 36 | µA | |||
| SSI | Delta current with clock enabled, module idle | 93 | µA | |||
| UART | Delta current with clock enabled, module idle | 164 | µA | |||