SNAS811 July 2020 – May CDCE6214
The CDCE6214 provides multiple power supply pins. Each of the power supplies supports 1.8 V, 2.5 V, or 3.3 V individually. Internal low-dropout regulators (LDO) source the internal blocks and allow each pin to be supplied with its individual supply voltage. The VDDREF pin supplies the control pins and the serial interface, therefore any pullup resistors shall be connected to the same domain as VDDREF.
The device is very flexible with respect to internal power management. Each block offers a power-down bit and can be disabled to save power when the block is not required. The available bits are illustrated in Table 15. The bypass output Y0 is connected to the pdn_ch4 bit. Each output channel has a bit which should be adapted to the applied supply voltage, ch[4:1]_1p8vdet.
|R0 - POWERDOWN||R0 - POWERDOWN||R0 - POWERDOWN||R0 - POWERDOWN|
|R5 - PLL_VCOBUFF_LDO_PD||R4 - CH1_PD||R4 - CH3_PD|
|R5 - PLL_VCO_LDO_PD||R4 - CH2_PD||R4 - CH4_PD|
|R5 - PLL_VCO_BUFF_PD|
|R5 - PLL_CP_LDO_PD|
|R5 - PLL_LOCKDET_PD|
|R5 - PLL_PSB_PD|
|R5 - PLL_PSA_PD|
|R5 - PLL_PFD_PD|
|R53 - PLL_NCTR_EN|
|R53 - PLL_CP_EN|