SCAS847I July   2007  – October 2016 CDCE925 , CDCEL925

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 EEPROM Specification
    7. 7.7 Timing Requirements: CLK_IN
    8. 7.8 Timing Requirements: SDA/SCL
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Control Terminal Setting
      2. 9.3.2 Default Device Setting
      3. 9.3.3 SDA/SCL Serial Interface
      4. 9.3.4 Data Protocol
    4. 9.4 Device Functional Modes
      1. 9.4.1 SDA/SCL Hardware Interface
    5. 9.5 Programming
    6. 9.6 Register Maps
      1. 9.6.1 SDA/SCL Configuration Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Spread Spectrum Clock (SSC)
        2. 10.2.2.2 PLL Multiplier/Divider Definition
        3. 10.2.2.3 Crystal Oscillator Start-Up
        4. 10.2.2.4 Frequency Adjustment With Crystal Oscillator Pulling
        5. 10.2.2.5 Unused Inputs and Outputs
        6. 10.2.2.6 Switching Between XO and VCXO Mode
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 Community Resources
    6. 13.6 Trademarks
    7. 13.7 Electrostatic Discharge Caution
    8. 13.8 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

PW Package
16-Pin TSSOP
Top View

Pin Functions

PIN TYPE(1) DESCRIPTION
NAME NO.
GND 5, 12 G Ground
SCL/S2 14 I SCL: Serial clock input (default configuration), LVCMOS; internal pullup
S2: User-programmable control input; LVCMOS inputs; internal pullup
SDA/S1 15 I/O SDA: Bidirectional serial data input/output (default configuration), LVCMOS; internal pullup
S1: User-programmable control input; LVCMOS inputs; internal pullup
S0 2 I User-programmable control input S0; LVCMOS inputs; internal pullup
VCtrl 4 I VCXO control voltage (leave open or pull up when not used)
VDD 3 P 1.8-V power supply for the device
VDDOUT 6, 9 P CDCEL925: 1.8-V supply for all outputs
CDCE925: 3.3-V or 2.5-V supply for all outputs
Xin/CLK 1 I Crystal oscillator input or LVCMOS clock Input (selectable through SDA/SCL bus)
Xout 16 O Crystal oscillator output (leave open or pull up when not used)
Y1 13 O LVCMOS output
Y2 11
Y3 10
Y4 7
Y5 8
(1) G = Ground, I = Input, O = Output, P = Power