SLPS235D October   2009  – November 2016 CSD16301Q2

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q2 Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Pattern
    4. 7.4 Q2 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

TA = 25°C (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 μA 25 V
IDSS Drain-to-source leakage current VGS = 0 V, VDS = 20 V 1 μA
IGSS Gate-to-source leakage current VDS = 0 V, VGS = +10/–8 V 100 nA
VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = 250 μA 0.9 1.1 1.55 V
RDS(on) Drain-to-source on resistance VGS = 3 V, IDS = 4 A 27 34 mΩ
VGS = 4.5 V, IDS = 4 A 23 29
VGS = 8 V, IDS = 4 A 19 24
gfs Transconductance VDS = 15 V, IDS = 4 A 16.5 S
DYNAMIC CHARACTERISTICS
CISS Input capacitance VGS = 0 V, VDS = 12.5 V, ƒ = 1 MHz 260 340 pF
COSS Output capacitance 165 215 pF
CRSS Reverse transfer capacitance 13 17 pF
Rg Series gate resistance 1.3 2.6 Ω
Qg Gate charge total (4.5 V) VDS = 10 V, IDS = 4 A 2.0 2.8 nC
Qgd Gate charge gate-to-drain 0.4 nC
Qgs Gate charge gate-to-source 0.6 nC
Qg(th) Gate charge at Vth 0.3 nC
QOSS Output charge VDS = 12.5 V, VGS = 0 V 3.0 nC
td(on) Turnon delay time VDS = 12.5 V, VGS = 4.5 V, IDS = 4 A
RG = 2 Ω		 2.7 ns
tr Rise time 4.4 ns
td(off) Turnoff delay time 4.1 ns
tf Fall time 1.7 ns
DIODE CHARACTERISTICS
VSD Diode forward voltage IDS = 4 A, VGS = 0 V 0.8 1 V
Qrr Reverse recovery charge VDD = 12.5 V, IF = 4 A, di/dt = 200 A/μs 5.1 nC
trr Reverse recovery time 11 ns

5.2 Thermal Information

TA = 25°C (unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-case thermal resistance(1) 8.4 °C/W
RθJA Junction-to-ambient thermal resistance(1)(2) 65 °C/W
(1) RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81-cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.
CSD16301Q2 M0164-01_LPS235.gif
Max RθJA = 65°C/W when mounted on 1 in2 (6.45 cm2) of 2-oz (0.071-mm) thick Cu.
CSD16301Q2 M0164-02_LPS235.gif
Max RθJA = 250°C/W when mounted on minimum pad area of 2-oz (0.071-mm) thick Cu.

5.3 Typical MOSFET Characteristics

TA = 25°C (unless otherwise specified)
CSD16301Q2 D001_SLPS235C.png
Figure 1. Transient Thermal Impedance
CSD16301Q2 D002_SLPS235C.gif
Figure 2. Saturation Characteristics
CSD16301Q2 D004_SLPS235C.gif
ID = 4 A VDS = 50 V
Figure 4. Gate Charge
CSD16301Q2 D006_SLPS235C.gif
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD16301Q2 D008_SLPS235C.gif
VGS = 4.5 V ID = 4 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD16301Q2 D010_SLPS235C.gif
Single pulse, max RθJC = 8.4°C/W
Figure 10. Maximum Safe Operating Area
CSD16301Q2 D012_SLPS235C.gif
Figure 12. Maximum Drain Current vs Temperature
CSD16301Q2 D003_SLPS235C.gif
VDS = 5 V
Figure 3. Transfer Characteristics
CSD16301Q2 D005_SLPS235C.gif
Figure 5. Capacitance
CSD16301Q2 D007_SLPS235C.gif
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD16301Q2 D009_SLPS235C.gif
Figure 9. Typical Diode Forward Voltage
CSD16301Q2 D011_SLPS235C.gif
Figure 11. Single Pulse Unclamped Inductive Switching