SLPS597C April   2017  – April 2018 CSD88599Q5DC

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings (1)
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Power Block Performance
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Power Block Device Characteristics
    7. 5.7 Typical Power Block MOSFET Characteristics
  6. 6Application and Implementation
    1. 6.1 Application Information
    2. 6.2 Brushless DC Motor With Trapezoidal Control
    3. 6.3 Power Loss Curves
    4. 6.4 Safe Operating Area (SOA) Curve
    5. 6.5 Normalized Power Loss Curves
    6. 6.6 Design Example – Regulate Current to Maintain Safe Operation
    7. 6.7 Design Example – Regulate Board and Case Temperature to Maintain Safe Operation
  7. 7Layout
    1. 7.1 Layout Guidelines
      1. 7.1.1 Electrical Performance
      2. 7.1.2 Thermal Considerations
    2. 7.2 Layout Example
  8. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Power Block Performance

TJ = 25°C (unless otherwise noted)
PARAMETERCONDITIONSMINTYPMAXUNIT
PLOSSPower loss(1)VIN = 36 V, VDD = 10 V,
IOUT = 30 A, ƒSW = 20 kHz,
TJ = 25°C, duty cycle = 50%,
L = 480 µH		3.0W
PLOSSPower lossVIN = 36 V, VDD = 10 V,
IOUT = 30 A, ƒSW = 20 kHz,
TJ = 125°C, duty cycle = 50%,
L = 480 µH		3.4W
(1) Measurement made with eight 10-µF 50-V ±10% X5R (TDK C3225X5R1H106K250AB or equivalent) ceramic capacitors placed across VIN to PGND pins and using UCC27210DDAR 100-V, 4-A driver IC.