SLASES7A July   2019  – December 2019 DAC43401 , DAC53401

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Functional Block Diagram
      2.      Power-Supply Control With the DACx3401
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements: I2CTM Standard mode
    7. 7.7  Timing Requirements: I2CTM Fast mode
    8. 7.8  Timing Requirements: I2CTM Fast+ mode
    9. 7.9  Typical Characteristics: VDD = 1.8 V (Reference = VDD) or VDD = 2 V (Internal Reference)
    10. 7.10 Typical Characteristics: VDD = 5.5 V (Reference = VDD) or VDD = 5 V (Internal Reference)
    11. 7.11 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital-to-Analog Converter (DAC) Architecture
        1. 8.3.1.1 Reference Selection and DAC Transfer Function
          1. 8.3.1.1.1 Power Supply as Reference
          2. 8.3.1.1.2 Internal Reference
      2. 8.3.2 DAC Update
        1. 8.3.2.1 DAC Update Busy
      3. 8.3.3 Nonvolatile Memory (EEPROM or NVM)
        1. 8.3.3.1 NVM Cyclic Redundancy Check
        2. 8.3.3.2 NVM_CRC_ALARM_USER Bit
        3. 8.3.3.3 NVM_CRC_ALARM_INTERNAL Bit
      4. 8.3.4 Programmable Slew Rate
      5. 8.3.5 Power-on-Reset (POR)
      6. 8.3.6 Software Reset
      7. 8.3.7 Device Lock Feature
      8. 8.3.8 PMBus Compatibility
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Down Mode
      2. 8.4.2 Continuous Waveform Generation (CWG) Mode
      3. 8.4.3 PMBus Compatibility Mode
      4. 8.4.4 Medical Alarm Generation Mode
        1. 8.4.4.1 Low-Priority Alarm
        2. 8.4.4.2 Medium-Priority Alarm
        3. 8.4.4.3 High-Priority Alarm
        4. 8.4.4.4 Interburst Time
        5. 8.4.4.5 Pulse Off Time
        6. 8.4.4.6 Pulse On Time
    5. 8.5 Programming
      1. 8.5.1 F/S Mode Protocol
      2. 8.5.2 DACx3401 I2C Update Sequence
      3. 8.5.3 Address Byte
      4. 8.5.4 Command Byte
      5. 8.5.5 I2C Read Sequence
    6. 8.6 Register Map
      1. 8.6.1  STATUS Register (address = D0h) (reset = 000Ch or 0014h)
        1. Table 18. STATUS Register Field Descriptions
      2. 8.6.2  GENERAL_CONFIG Register (address = D1h) (reset = 01F0h)
        1. Table 19. GENERAL_CONFIG Register Field Descriptions
      3. 8.6.3  MED_ALARM_CONFIG Register (address = D2h) (reset = 0000h)
        1. Table 20. MED_ALARM_CONFIG Register Field Descriptions
      4. 8.6.4  TRIGGER Register (address = D3h) (reset = 0008h)
        1. Table 21. TRIGGER Register Field Descriptions
      5. 8.6.5  DAC_DATA Register (address = 21h) (reset = 0000h)
        1. Table 22. DAC_DATA Register Field Descriptions
      6. 8.6.6  DAC_MARGIN_HIGH Register (address = 25h) (reset = 0000h)
        1. Table 23. DAC_MARGIN_HIGH Register Field Descriptions
      7. 8.6.7  DAC_MARGIN_LOW Register (address = 26h) (reset = 0000h)
        1. Table 24. DAC_MARGIN_LOW Register Field Descriptions
      8. 8.6.8  PMBUS_OPERATION Register (address = 01h) (reset = 0000h)
        1. Table 25. PMBUS_OPERATION Register Field Descriptions
      9. 8.6.9  PMBUS_STATUS_BYTE Register (address = 78h) (reset = 0000h)
        1. Table 26. PMBUS_STATUS_BYTE Register Field Descriptions
      10. 8.6.10 PMBUS_VERSION Register (address = 98h) (reset = 2200h)
        1. Table 27. PMBUS_VERSION Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Programmable LED Biasing
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Power-Supply Margining
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Medical Alarm Generation
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.3.2 Detailed Design Procedure

Two DACx3401 devices are required: one device to generate the pulse envelope and the burst, and the second device to generate the pulse frequency. As shown in Figure 70, mix both these signals together using the TLV342S amplifier with shutdown. Feed the combined signal to a power amplifier, such as the LM158, to drive the speaker. This design provides a gain of 2 at the speaker amplifier. The actual gain required in a system depends on the acoustic output requirements from the speaker. The RC high-pass filter, designed for a cut-off frequency of approximately 80 Hz at the input of LM158, removes the dc component from the signal so that this signal can be applied to the speaker directly. As per the medical alarm standard, the pulse frequency must be above 150 Hz. As a result of the square-wave pulse frequency and the mixing done by TLV342S, the speaker output has multiple harmonics of the fundamental pulse frequency, thus fulfilling the requirement of the medical alarm standard. The DACx3401 provide various options to program the pulse frequency and envelope timings. See the Medical Alarm Generation Mode section for the alarm configuration options. Calculate the frequency of a square wave or pulse frequency using Equation 3. The square wave function has a limited number of frequencies because this function is programmed by the SLEW_RATE bit alone. To get a higher number of frequencies, generate a triangular waveform with comparator mode output. Generate the triangular waveform using Equation 4. Set the DAC output in the comparator mode by fixing the VFB pin to the midscale of the DAC using a resistive voltage divider from VDD. Select VDD as the reference in this case using the GENERAL_CONFIG register.

The pseudocode for getting started with a medical alarm application using two DACs is as follows:

//SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>
//Power-up the first DAC, enable VDD reference
//SLEW_RATE: 1.6384 ms (Square wave frequency: 610 Hz)
WRITE GENERAL_CONFIG(0xD1), 0xD1, 0x58
//Set MARGIN_HIGH on the first DAC
WRITE DAC_MARGIN_HIGH(0x25), 0x0F, 0xFC
//Set MARGIN_LOW on the first DAC
WRITE DAC_MARGIN_LOW(0x26), 0x00, 0x00
//Trigger square wave generation on the first DAC
WRITE TRIGGER(0xD3), 0x01, 0x00

//Power-up the second DAC, enable VDD reference
//CODE_STEP: 8 LSB, SLEW_RATE: 204.8 µs x 1.75 = 358.4 µs (Envelope rise/fall times for full-scale: ~26 ms)
WRITE GENERAL_CONFIG(0xD1), 0x1A, 0xE8
//OPTION-1: Configure the second DAC for low-priority alarm with minimum time settings and trigger
WRITE MED_ALARM_CONFIG(0xD2), 0x01, 0x00
//OPTION-2: Configure the second DAC for medium-priority alarm with minimum time settings and trigger
WRITE MED_ALARM_CONFIG(0xD2), 0x02, 0x00
//OPTION-3: Configure the second DAC for high-priority alarm with minimum time settings and trigger
WRITE MED_ALARM_CONFIG(0xD2), 0x04, 0x00
//Set MARGIN_HIGH on the second DAC
WRITE DAC_MARGIN_HIGH(0x25), 0x0F, 0xFC
//Set MARGIN_LOW on the second DAC
WRITE DAC_MARGIN_LOW(0x26), 0x00, 0x00