SLASES7A July 2019 – December 2019 DAC43401 , DAC53401
PRODUCTION DATA.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DEVICE_UNLOCK_CODE | X | DEVICE_
CONFIG_ RESET |
START_
FUNC_ GEN |
PMBUS_
MARGIN_ HIGH |
PMBUS_
MARGIN_ LOW |
NVM_
RELOAD |
NVM_
PROG |
SW_RESET | |||||||
W-0h | X | W-0h | W-0h | R/W-0h | R/W-0h | W-0h | W-0h | W-8h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15 - 12 | DEVICE_UNLOCK_CODE | W | 0000 | Write 0101 to unlock the device to bypass DEVICE_LOCK bit. |
11 - 10 | X | X | 0h | Don't care |
9 | DEVICE_CONFIG_RESET | W | 0 | 0: Device configuration reset not initiated
1: Device configuration reset initiated. All registers loaded with factory reset values. |
8 | START_FUNC_GEN | W | 0 | 0: Continuous waveform generation mode disabled
1: Continuous waveform generation mode enabled, device generates continuous waveform based on FUNC_CONFIG (D1h), MARGIN_LOW (address 18h), and SLEW_RATE (address D1h) bits. |
7 | PMBUS_MARGIN_HIGH | R/W | 0 | 0: PMBus margin high command not initiated
1: PMBus margin high command initiated, DAC output margins high to MARGIN_HIGH code (address 25h). This bit automatically resets to 0 after the DAC code reaches MARGIN_HIGH value. |
6 | PMBUS_MARGIN_LOW | R/W | 0 | 0: PMBus margin low command not initiated
1: PMBus margin low command initiated, DAC output margins low to MARGIN_LOW code (address 26h). This bit automatically resets to 0 after the DAC code reaches MARGIN_LOW value. |
5 | NVM_RELOAD | W | 0 | 0: NVM reload not initiated
1: NVM reload initiated, applicable DAC registers loaded with corresponding NVM. NVM_BUSY bit set to 1 which this operation is in progress.. This is a self-resetting bit. |
4 | NVM_PROG | W | 0 | 0: NVM write not initiated
1: NVM write initiated, NVM corresponding to applicable DAC registers loaded with existing register settings. NVM_BUSY bit set to 1 which this operation is in progress. This is a self-resetting bit. |
3 - 0 | SW_RESET | W | 1000 | 1000: Software reset not initiated
1010: Software reset initiated, DAC registers loaded with corresponding NVMs, all other registers loaded with default settings. |