SLAS536D September   2007  – November 2021 DAC5662A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Resistance Characteristics
    5. 6.5  Electrical Characteristics
    6. 6.6  Electrical Characteristics
    7. 6.7  Electrical Characteristics, AC
    8. 6.8  Electrical Characteristics, DC
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Digital Inputs and Timing
      1. 7.1.1 Digital Inputs
      2. 7.1.2 Input Interfaces
      3. 7.1.3 Dual-Bus Data Interface and Timing
      4. 7.1.4 Single-Bus Interleaved Data Interface and Timing
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Transfer Function
      2. 8.3.2 Analog Outputs
      3. 8.3.3 Output Configurations
      4. 8.3.4 Differential With Transformer
      5. 8.3.5 Single-Ended Configuration
      6. 8.3.6 Reference Operation
        1. 8.3.6.1 Internal Reference
        2. 8.3.6.2 External Reference
      7. 8.3.7 Gain Setting Option
    4. 8.4 Device Functional Modes
      1. 8.4.1 Sleep Mode
  9. 9 Application and Implementation
    1. 9.1 Application Informmation
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

over operating free-air temperature range, AVDD = DVDD = 3.3 V, I(OUTFS) = 20 mA, independent gain set mode (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
DC Specifications
Resolution12Bits
DC Accuracy(1)
INLIntegral nonlinearity1 LSB = I(OUTFS)/212, TA = 25°C-2±0.32LSB
DNLDifferential nonlinearity-2±0.22LSB
Analog Output
Offset error0.03%FSR
Gain errorWith external reference±0.25%FSR
With internal reference±0.5%FSR
Minimum full-scale output current(2)2mA
Maximum full-scale output current(2)20mA
Gain mismatchWith internal reference-20.07+2%FSR
Output voltage compliance range(3)-11.25V
ROOutput resistance300kΩ
COOutput capacitance5pF
Reference Output
Reference voltage1.141.21.26V
Reference output current(4)100nA
Reference Input
V(EXTIO)Input voltage0.11.25V
RIInput resistance1MΩ
Small signal bandwidth300kHz
CIInput capacitance100pF
Temperature Coefficients
Offset drift0ppm of FSR/°C
Gain driftWith external reference±50ppm of FSR/°C
With internal reference±50ppm of FSR/°C
Reference voltage drift±20ppm/°C
(1) Measured differentially through 50 Ω to AGND.
(2) Nominal full-scale current, I(OUTFS), equals 32x the IBIAS current.
(3) The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown, resulting in reduced reliability of the DAC5662A device. The upper limit of the output compliance is determined by the load resistors and full-scale output current. Exceeding the upper limit adversely affects distortion performance and integral nonlinearity.
(4) Use an external buffer amplifier with high impedance input to drive any external load.