SBAS871C
August 2017 – January 2019
DAC60504
,
DAC70504
,
DAC80504
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Block Diagram
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Digital-to-Analog Converter (DAC)
8.3.1.1
DAC Transfer Function
8.3.1.2
Output Amplifiers
8.3.1.3
DAC Register Structure
8.3.1.3.1
DAC Register Synchronous and Asynchronous Updates
8.3.1.3.2
Broadcast DAC Register
8.3.2
Internal Reference
8.3.2.1
Reference Divider
8.3.2.2
Solder Heat Reflow
8.3.3
Device Reset Options
8.3.3.1
Power-on-Reset (POR)
8.3.3.2
Software Reset
8.4
Device Functional Modes
8.4.1
Stand-Alone Operation
8.4.2
Daisy-Chain Operation
8.4.3
Frame Error Checking
8.4.4
Power-Down Mode
8.5
Programming
8.6
Register Map
8.6.1
NOP Register (address = 0x00) [reset = 0x0000]
Table 9.
NOP Register Field Descriptions
8.6.2
DEVICE ID Register (address = 0x01) [reset = 0x---]
Table 10.
DEVICE ID Field Descriptions
8.6.3
SYNC Register (address = 0x2) [reset = 0xFF00]
Table 11.
SYNC Register Field Descriptions
8.6.4
CONFIG Register (address = 0x3) [reset = 0x0000]
Table 12.
CONFIG Register Field Descriptions
8.6.5
GAIN Register (address = 0x04) [reset = 0x---]
Table 13.
GAIN Register Field Descriptions
8.6.6
TRIGGER Register (address = 0x05) [reset = 0x0000]
Table 14.
TRIGGER Register Field Descriptions
8.6.7
BRDCAST Register (address = 0x6) [reset = 0x0000]
Table 15.
BRDCAST Register Field Descriptions
8.6.8
STATUS Register (address = 0x7) [reset = 0x0000]
Table 16.
STATUS Register Field Descriptions
8.6.9
DACx Register (address = 0x8 to 0xF) [reset = 0x0000 or 0x8000]
Table 17.
DACx Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.1.1
Interfacing to a Microcontroller
9.1.2
Programmable Current Source Circuit
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Related Links
12.3
Receiving Notification of Documentation Updates
12.4
Community Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTE|16
MPQF149D
Thermal pad, mechanical data (Package|Pins)
RTE|16
QFND298F
Orderable Information
sbas871c_oa
sbas871c_pm
8.6.2
DEVICE ID Register (address = 0x01) [reset = 0x---]
Figure 66.
DEVICE ID Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DEVICEID
VERSIONID
R
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10.
DEVICE ID Field Descriptions
Bit
Field
Type
Reset
Description
15:2
DEVICEID
R
----
Device ID:
D15 Reserved - 0
D14:12 Resolution - 000 (16-bit); 001 (14-bit); 010 (12-bit)
D11:4 Channels - 0100 (4 channels)
D7 Reset - Determined by RSTSEL pin. 0 (reset to zero); 1 (reset to midscale)
D6:2 Reserved - 00101
1:0
VERSIONID
R
11
Version ID. Subject to change