SLASEO0B July   2018  – June 2021 DAC61416 , DAC71416 , DAC81416

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital-to-Analog Converter (DAC) Architecture
        1. 8.3.1.1 DAC Transfer Function
        2. 8.3.1.2 DAC Register Structure
          1. 8.3.1.2.1 DAC Register Synchronous and Asynchronous Updates
          2. 8.3.1.2.2 Broadcast DAC Register
          3. 8.3.1.2.3 Clear DAC Operation
      2. 8.3.2 Internal Reference
      3. 8.3.3 Device Reset Options
        1. 8.3.3.1 Power-on-Reset (POR)
        2. 8.3.3.2 Hardware Reset
        3. 8.3.3.3 Software Reset
      4. 8.3.4 Thermal Protection
        1. 8.3.4.1 Analog Temperature Sensor: TEMPOUT Pin
        2. 8.3.4.2 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Toggle Mode
      2. 8.4.2 Differential Mode
      3. 8.4.3 Power-Down Mode
    5. 8.5 Programming
      1. 8.5.1 Stand-Alone Operation
        1. 8.5.1.1 Streaming Mode Operation
      2. 8.5.2 Daisy-Chain Operation
      3. 8.5.3 Frame Error Checking
    6. 8.6 Register Maps
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1 Overview

The DACx1416 are a pin-compatible family of 16-channel, buffered, high-voltage output digital-to-analog converters (DACs) with 16‑bit, 14‑bit, and 12‑bit resolution. The DACx1416 include a 2.5-V internal reference. A user-selectable output configuration enables full-scale bipolar output voltages of ±20 V, ±10 V, ±5 V or ±2.5 V, and full-scale unipolar output voltages of 40 V, 20 V, 10 V or 5 V. The full-scale output range for each DAC channel is independently programmable. In addition, each pair of DAC channels can be configured to provide a differential output. Three dedicated A-B toggle pins enable dither signal generation with up to three possible frequencies.

The DACx1416 operate from five supply voltages: VDD, VAA, VCC, VSS and VIO.

  • VDD and VAA are the digital and analog supplies for the DACs, internal reference and other low voltage components and must be set at the same potential.
  • VCC and VSS are the positive and analog supplies for the DAC output amplifiers.
  • VIO sets the logic levels for the digital inputs and outputs.

Communication with the DACx1416 is performed through a 4-wire serial interface that supports stand-alone and daisy-chain operation. The optional frame-error checking provides added robustness to the DACx1416 serial interface.

The DACx1416 incorporate a power-on-reset circuit that connects the DAC outputs to ground at power up. The outputs remain in this state until the device registers are properly configured for operation.