DLPS021 September 2019 DLP470TP
The DLP470TP DMD is part of a chipset that is controlled by two DLPC6421 display controllers in conjunction with the DLPA3005 PMIC and LED driver. These guidelines are targeted at designing a PCB board with the DLP470TP DMD. The DMD board is a high-speed multi-layer PCB, with primarily high-speed digital logic utilizing dual edge clock rates up to 400 MHz for DMD LVDS signals. The remaining traces are comprised of low speed digital LVTTL signals. TI recommends that mini power planes are used for VOFFSET, VRESET, and VBIAS. Solid planes are required for Ground (VSS). The target impedance for the PCB is 50 Ω ±10% with the LVDS traces being 100 Ω ±10% differential. TI recommends using an 8 layer stack-up as described in Table 9.