DLPS282 July   2025 DLP473TE

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Storage Conditions
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions
    5.     11
    6.     12
    7. 5.5  Thermal Information
    8. 5.6  Electrical Characteristics
    9. 5.7  Switching Characteristics
    10. 5.8  Timing Requirements
      1.      17
    11. 5.9  System Mounting Interface Loads
    12. 5.10 Micromirror Array Physical Characteristics
    13. 5.11 Micromirror Array Optical Characteristics
    14. 5.12 Window Characteristics
    15. 5.13 Chipset Component Usage Specification
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Interface
      2. 6.3.2 Timing
    4. 6.4 Device Functional Modes
    5. 6.5 Optical Interface and System Image Quality Considerations
      1. 6.5.1 Numerical Aperture and Stray Light Control
      2. 6.5.2 Pupil Match
      3. 6.5.3 Illumination Overfill
    6. 6.6 Micromirror Array Temperature Calculation
    7. 6.7 Micromirror Power Density Calculation
    8. 6.8 Window Aperture Illumination Overfill Calculation
    9. 6.9 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 6.9.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 6.9.2 Landed Duty Cycle and Useful Life of the DMD
      3. 6.9.3 Landed Duty Cycle and Operational DMD Temperature
      4. 6.9.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Temperature Sensor Diode
  9. Power Supply Recommendations
    1. 8.1 DMD Power Supply Power-Up Procedure
    2. 8.2 DMD Power Supply Power-Down Procedure
  10. Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Device Support
      1. 9.2.1 Device Nomenclature
      2. 9.2.2 Device Markings
    3. 9.3 Documentation Support
      1. 9.3.1 Related Documentation
    4. 9.4 Receiving Notification of Documentation Updates
    5. 9.5 Support Resources
    6. 9.6 Trademarks
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Recommended Operating Conditions

Over operating free-air temperature range and supply voltages (unless otherwise noted). The functional performance of the device specified in this data sheet is achieved when operating the device within the limits defined by the Recommended Operating Conditions. No level of performance is implied when operating the device above or below the Recommended Operating Conditions limits.
MINTYPMAXUNIT
SUPPLY VOLTAGE RANGE
VDDSupply voltage for LVCMOS core logic(1)(2)
Supply voltage for LPSDR low-speed interface
1.711.81.95V
VDDISupply voltage for SubLVDS receivers(1)(2)1.711.81.95V
VOFFSETSupply voltage for HVCMOS and micromirror electrode(1)(2)(3)9.51010.5V
VBIASSupply voltage for mirror electrode(1)(2)17.51818.5V
VRESETSupply voltage for micromirror electrode(1)(2)–14.5–14–13.5V
|VDDI - VDD|Supply voltage delta (absolute value)(1)(2)(4)0.3V
|VBIAS-VOFFSET|Supply voltage delta (absolute value)(1)(2)(5)10.5V
|VBIAS - VRESET|Supply voltage delta (absolute value)(1)(2)(6)33V
CLOCK FREQUENCY
fclockClock frequency for low speed interface LS_CLK(7)108120MHz
Clock frequency for high-speed interface DCLK(8)720MHz
DCDINDuty cycle distortion48%52%
DCDOUTDuty cycle distortion44%50%56%
SUBLVDS INTERFACE
|VID|LVDS differential input voltage magnitude(8)150250350mV
VCMCommon mode voltage(8)7009001100mV
VSUBLVDSSubLVDS voltage(8)5251275mV
ZLINELine differential impedance (PWB/trace)90100110Ω
ZINInternal differential termination resistance(10)80100120Ω
100Ω differential PCB trace6.35152.4mm
ENVIRONMENTAL
TARRAYArray temperature, long-term operation(9)(10)(11)(12)1040 to 70°C
Array temperature, short-term operation, 500 hr max(10)(13)010°C
TDP-AVGAverage dew point temperature, (non-condensing)(14)28°C
TDP-ELRElevated dew point temperature range, (non-condensing)(15)2836°C
CTELRCumulative time in elevated dew point temperature range28Months
QAP-LLWindow Aperture illumination overfill(16)(17)(18)17W/cm2
ILLUMINATION LPCW, RGB Laser and LED
ILLUVIllumination, wavelength < 410nm(9)(20)10mW/cm2
ILLVISIllumination power at wavelengths ≥ 410nm and ≤ 800nm(19)(20)60W/cm2
ILLIRIllumination, wavelength between > 800nm(20)10mW/cm2
ILLBLUIllumination power at wavelengths ≥ 410nm and ≤ 475nm(19)(20)19.5W/cm2
ILLBLU1Illumination power at wavelengths ≥ 410nm and ≤ 440nm(19)(20)3.06W/cm2
The following power supplies are required to operate the DMD: VDD, VDDI, VOFFSET, VBIAS, and VRESET. All VSS connections are required to operate the DMD.
All voltage values are with respect to the VSS ground pins.
VOFFSET supply transients must fall within the specified max voltages.
To prevent excess current, the supply voltage delta |VDDI – VDD| must be less than the specified limit.
To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than the specified limit.
To prevent excess current, the supply voltage delta |VBIAS – VRESET| must be less than the specified limit.
LS_CLK must run as specified to ensure internal DMD timing for reset waveform commands.
Refer to the SubLVDS timing requirements in Timing Requirements.
Simultaneous exposure of the DMD to the maximum Recommended Operating Conditions for temperature and UV illumination will reduce device lifetime.
The array temperature cannot be measured directly and must be computed analytically from the temperature measured at test point (TP1) and the package thermal resistance using the Micromirror Array Temperature Calculation.
The maximum operational array temperature is derated based on the micromirror landed duty cycle that the DMD experiences in the end application. See the Section 6.9.1 section for a definition of micromirror landed duty cycle.
Long-term is defined as the usable life of the device.
Short-term is the total cumulative time over the useful life of the device.
The average over time (including storage and operating) that the device is not in the elevated dew point temperature range.
Exposure to dew point temperatures in the elevated range during storage and operation is limited to less than a total cumulative time of CTELR.
Applies to the region defined in the Figure 5-2.
The active area of the DMD is surrounded by an aperture on the inside of the DMD window surface that masks structures of the DMD device assembly from normal view. The aperture is sized to anticipate several optical conditions. Overfill light illuminating the area outside the active array can scatter and create adverse effects to the performance of an end application using the DMD. Minimizing the light flux incident outside the active array is a design requirement of the illumination optical system. Depending on the particular optical architecture and assembly tolerances of the optical system, the amount of overfill light on the outside of the active array may cause system performance degradation.
To calculate, see the Section 6.8.
The maximum allowable optical power incident on the DMD is limited by the maximum optical power density for each wavelength range specified and the micromirror array temperature (TARRAY).
To calculate, see the Section 6.7.