DLPS073F March   2016  – May 2019 DLP5530-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      DLP5530-Q1 DLP Chipset System Block Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions – Connector Pins
    2.     Pin Functions – Test Pads
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Storage Conditions
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  Switching Characteristics
    9. 6.9  System Mounting Interface Loads
    10. 6.10 Physical Characteristics of the Micromirror Array
    11. 6.11 Micromirror Array Optical Characteristics
    12. 6.12 Window Characteristics
    13. 6.13 Chipset Component Usage Specification
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Sub-LVDS Data Interface
      2. 7.3.2 Low Speed Interface for Control
      3. 7.3.3 DMD Voltage Supplies
      4. 7.3.4 Asynchronous Reset
      5. 7.3.5 Temperature Sensing Diode
        1. 7.3.5.1 Temperature Sense Diode Theory
    4. 7.4 System Optical Considerations
      1. 7.4.1 Numerical Aperture and Stray Light Control
      2. 7.4.2 Pupil Match
      3. 7.4.3 Illumination Overfill
    5. 7.5 DMD Image Performance Specification
    6. 7.6 Micromirror Array Temperature Calculation
    7. 7.7 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 7.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application Overview
      2. 8.2.2 Reference Design
      3. 8.2.3 Application Mission Profile Consideration
  9. Power Supply Recommendations
    1. 9.1 Power Supply Power-Up Procedure
    2. 9.2 Power Supply Power-Down Procedure
    3. 9.3 Power Supply Sequencing Requirements
  10. 10Layout
    1. 10.1 Layout Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
      2. 11.1.2 Device Markings
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 DMD Handling
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • FYK|149
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Micromirror Array Temperature Calculation

DLP5530-Q1 dmd_therm_test_pts.gifFigure 19. DMD Thermal Test Points

The active array temperature can be computed analytically from measurement points on the outside of the package, the package thermal resistance, the electrical power, and the illumination heat load.

Relationship between array temperature and the reference ceramic temperature (thermocouple location TP1 in Figure 19) is provided by the following equations:

Equation 1. TARRAY = TCERAMIC + (QARRAY × RARRAY–TO–CERAMIC)
Equation 2. QARRAY = QELECTRICAL + QILLUMINATION

where

  • TARRAY = computed DMD array temperature (°C)
  • TCERAMIC = measured ceramic temperature, TP1 location in Figure 19 (°C)
  • RARRAY–TO–CERAMIC = DMD package thermal resistance from array to thermal test point TP1 (°C/W), see Thermal Information
  • QARRAY = total power, electrical plus absorbed, on the DMD array (W)
  • QELECTRICAL = nominal electrical power dissipation by the DMD (W)
  • QILLUMINATION = (CL2W × SL)
  • CL2W = conversion constant for screen lumens to power on the DMD (W/lm)
  • SL = measured screen lumens (lm)

Electrical power dissipation of the DMD is variable and depends on the voltages, data rates, and operating frequencies.

Absorbed power from the illumination source is variable and depends on the operating state of the mirrors and the intensity of the light source.

Equations shown above are valid for a 1–chip DMD system with a total projection efficiency from DMD to the screen of 87%.

The constant CL2W is based on the DMD array characteristics. It assumes a spectral efficiency of 300 lm/W for the projected light and illumination distribution of 83.7% on the active array, and 16.3% on the array border.

The following is a sample calculation for a typical projection application:

  1. SL = 50 lm
  2. CL2W = 0.00293 W/lm
  3. QELECTRICAL = 0.4 W (This number does not represent an actual DMD electrical power; for illustration purposes only)
  4. RARRAY–TO–CERAMIC = 1.1°C/W
  5. TCERAMIC = 55°C
  6. QARRAY = 0.4 W + (0.00293 W/lm × 50 lm) = 0.5465 W
  7. TARRAY = 55°C + (0.5465 W × 1.1°C/W) = 55.6°C