DLPS026F
August 2012 – June 2019
DLP7000
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Application
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
Storage Conditions
7.3
ESD Ratings
7.4
Recommended Operating Conditions
7.5
Thermal Information
7.6
Electrical Characteristics
7.7
LVDS Timing Requirements
7.8
LVDS Waveform Requirements
7.9
Serial Control Bus Timing Requirements
7.10
Systems Mounting Interface Loads
7.11
Micromirror Array Physical Characteristics
7.12
Micromirror Array Optical Characteristics
7.13
Window Characteristics
7.14
Chipset Component Usage Specification
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
DLPC410 Chipset DMD Features
8.3.1.1
DLPC410 - Digital Controller for DLP Discovery 4100 Chipset
8.3.1.2
DLPA200 - DMD Micromirror Driver
8.3.1.3
DLPR410 - PROM for DLP Discovery 4100 Chipset
8.3.1.4
DLP7000 - DLP 0.7 XGA 2xLVDS Type-A DMD
8.3.1.4.1
DLP7000 XGA Chip Set Interfaces
8.3.1.4.1.1
DLPC410 Interface Description
8.3.1.4.1.1.1
DLPC410 IO
8.3.1.4.1.1.2
Initialization
8.3.1.4.1.1.3
DMD Device Detection
8.3.1.4.1.1.4
Power Down
8.3.1.4.2
DLPC410 to DMD Interface
8.3.1.4.2.1
DLPC410 to DMD IO Description
8.3.1.4.2.2
Data Flow
8.3.1.4.3
DLPC410 to DLPA200 Interface
8.3.1.4.3.1
DLPA200 Operation
8.3.1.4.3.2
DLPC410 to DLPA200 IO Description
8.3.1.4.4
DLPA200 to DLP7000 Interface
8.3.1.4.4.1
DLPA200 to DLP7000 Interface Overview
8.3.1.5
Measurement Conditions
8.4
Device Functional Modes
8.4.1
DMD Operation
8.4.1.1
Single Block Mode
8.4.1.2
Dual Block Mode
8.4.1.3
Quad Block Mode
8.4.1.4
Global Mode
8.5
Optical Interface and System Image Quality Considerations
8.5.1
Optical Interface and System Image Quality
8.5.2
Numerical Aperture and Stray Light Control
8.5.3
Pupil Match
8.5.4
Illumination Overfill
8.6
Micromirror Array Temperature Calculation
8.6.1
Package Thermal Resistance
8.6.2
Case Temperature
8.6.3
Micromirror Array Temperature Calculation - Lumens Based (typically used for display applications)
8.6.4
Micromirror Array Temperature Calculation - Power Density Based
8.7
Micromirror Landed-On/Landed-Off Duty Cycle
8.7.1
Definition of Micromirror Landed-On/Landed-Off Duty Cycle
8.7.2
Landed Duty Cycle and Useful Life of the DMD
8.7.3
Landed Duty Cycle and Operational DMD Temperature
8.7.4
Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Device Description
9.2.3
Detailed Design Procedure
10
Power Supply Recommendations
10.1
DMD Power-Up and Power-Down Procedures
11
Layout
11.1
Layout Guidelines
11.1.1
Impedance Requirements
11.1.2
PCB Signal Routing
11.1.3
DMD Interface
11.1.3.1
Trace Length Matching
11.1.4
DLP7000 Decoupling
11.1.4.1
Decoupling Capacitors
11.1.5
VCC and VCC2
11.1.6
DMD Layout
11.1.7
DLPA200
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Device Nomenclature
12.1.2
Device Marking
12.2
Documentation Support
12.2.1
Related Documents
12.3
Related Links
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
FLP|203
MCLC005B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
dlps026f_oa
1
Features
0.7-Inch diagonal micromirror array
1024 × 768 array of Al, micrometer-sized mirrors
13.68-µm micromirror pitch
±12° micromirror tilt angle (relative to flat state)
Designed for corner illumination
Use with
visible light (400 nm to 700 nm):
Window transmission 97% (single pass, through two window surfaces)
Micromirror reflectivity 88%
Array diffraction efficiency 86%
Array fill factor 92%
Two 16-Bit, low voltage differential signaling (LVDS) double data rate (DDR) input data buses
Iinput data clock rate up to 400 MHz
40.64 mm × 31.75 mm × 6.0 mm package
Hermetic package