DLPS026F August   2012  – June 2019 DLP7000

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Storage Conditions
    3. 7.3  ESD Ratings
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Information
    6. 7.6  Electrical Characteristics
    7. 7.7  LVDS Timing Requirements
    8. 7.8  LVDS Waveform Requirements
    9. 7.9  Serial Control Bus Timing Requirements
    10. 7.10 Systems Mounting Interface Loads
    11. 7.11 Micromirror Array Physical Characteristics
    12. 7.12 Micromirror Array Optical Characteristics
    13. 7.13 Window Characteristics
    14. 7.14 Chipset Component Usage Specification
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DLPC410 Chipset DMD Features
        1. 8.3.1.1 DLPC410 - Digital Controller for DLP Discovery 4100 Chipset
        2. 8.3.1.2 DLPA200 - DMD Micromirror Driver
        3. 8.3.1.3 DLPR410 - PROM for DLP Discovery 4100 Chipset
        4. 8.3.1.4 DLP7000 - DLP 0.7 XGA 2xLVDS Type-A DMD
          1. 8.3.1.4.1 DLP7000 XGA Chip Set Interfaces
            1. 8.3.1.4.1.1 DLPC410 Interface Description
              1. 8.3.1.4.1.1.1 DLPC410 IO
              2. 8.3.1.4.1.1.2 Initialization
              3. 8.3.1.4.1.1.3 DMD Device Detection
              4. 8.3.1.4.1.1.4 Power Down
          2. 8.3.1.4.2 DLPC410 to DMD Interface
            1. 8.3.1.4.2.1 DLPC410 to DMD IO Description
            2. 8.3.1.4.2.2 Data Flow
          3. 8.3.1.4.3 DLPC410 to DLPA200 Interface
            1. 8.3.1.4.3.1 DLPA200 Operation
            2. 8.3.1.4.3.2 DLPC410 to DLPA200 IO Description
          4. 8.3.1.4.4 DLPA200 to DLP7000 Interface
            1. 8.3.1.4.4.1 DLPA200 to DLP7000 Interface Overview
        5. 8.3.1.5 Measurement Conditions
    4. 8.4 Device Functional Modes
      1. 8.4.1 DMD Operation
        1. 8.4.1.1 Single Block Mode
        2. 8.4.1.2 Dual Block Mode
        3. 8.4.1.3 Quad Block Mode
        4. 8.4.1.4 Global Mode
    5. 8.5 Optical Interface and System Image Quality Considerations
      1. 8.5.1 Optical Interface and System Image Quality
      2. 8.5.2 Numerical Aperture and Stray Light Control
      3. 8.5.3 Pupil Match
      4. 8.5.4 Illumination Overfill
    6. 8.6 Micromirror Array Temperature Calculation
      1. 8.6.1 Package Thermal Resistance
      2. 8.6.2 Case Temperature
      3. 8.6.3 Micromirror Array Temperature Calculation - Lumens Based (typically used for display applications)
      4. 8.6.4 Micromirror Array Temperature Calculation - Power Density Based
    7. 8.7 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 8.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 8.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 8.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 8.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Device Description
      3. 9.2.3 Detailed Design Procedure
  10. 10Power Supply Recommendations
    1. 10.1 DMD Power-Up and Power-Down Procedures
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Impedance Requirements
      2. 11.1.2 PCB Signal Routing
      3. 11.1.3 DMD Interface
        1. 11.1.3.1 Trace Length Matching
      4. 11.1.4 DLP7000 Decoupling
        1. 11.1.4.1 Decoupling Capacitors
      5. 11.1.5 VCC and VCC2
      6. 11.1.6 DMD Layout
      7. 11.1.7 DLPA200
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
      2. 12.1.2 Device Marking
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documents
    3. 12.3 Related Links
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from E Revision (May 2017) to F Revision

  • Deleted "Broadband" Go
  • Changed values for high speed pattern ratesGo
  • Changed package type to FLP (203)Go
  • Changed package type to FLP; deleted reference to LCCC Go
  • Changed FLP package figure "bottom view"Go
  • Changed "Case temperature" to "Array temperature" Go
  • Changed "Case temperature" to "Array temperature" Go
  • Changed "Device temperature gradient - operational" to "Absolute temperature delta between the window test points (TP2, TP3) and the ceramic test point TP1" Go
  • Deleted "RH" after "%" Go
  • Changed "Applicable before the DMD is installed in the final product" to "Applicable for the DMD as a component or non-operating system"Go
  • Changed ", non-condensing" to "(non-condensing)" Go
  • Changed "JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process." to "JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible if necessary precautions are taken." Go
  • Changed Table "Recommended Operating Conditions"Go
  • Added "RH" under "Environmental" Go
  • Added cross reference to table note at row "ILLVIS" Go
  • Changed Array temperature, Long-term operational MAX from "30" to "40"Go
  • Changed package type to FLP in table "THERMAL METRIC"Go
  • Added "or the combined loads of the thermal and electrical areas reduced"Go
  • Deleted row "Window artifact size" in table "Window Characteristics"Go
  • Changed mirror pitch to 13.68 μmGo
  • Changed figure "DLPC410 Data Flow" to correct signals of LVDS BUS B outGo
  • Changed "Window Characteristics and Optics" to "Optical Interface and System Image Quality Considerations" Go
  • Changed "a Thermal Test Point locations 1 and 2" to "thermal test points TP1, TP2, and TP3"Go
  • Added "(typically used for display applications)" to "Micromirror Array Temperature Calculation - Lumens based" Go
  • Deleted Subsection "Fiducials" Go

Changes from D Revision (November 2015) to E Revision

  • Clarified TGRADIENT footnoteGo
  • Changed TC2 to TP1 to follow latest thermal test point nomenclature convention in Thermal InformationGo
  • Changed Micromirror active border from 10 to correct value of 6 Go
  • Changed micromirror crossover to mean transition time and renamed previous crossover to micromirror switching time typical micromirror crossover time typo (16 µs to 13 µs)Go
  • Added typical micromirror switching time - 13 µsGo
  • Changed "Micromirror switching time" to "Array switching time" for clarity Go
  • Added clarification to Micromirror switching time at 400 MHz with global reset Go
  • Changed references to D4100 Discovery to DPC410 Go
  • Changed Thermal Test Point Location drawing to current numbering convention Go
  • Changed Micromirror Array Temperature Calculations to indicate that it is based on lumensGo
  • Added Micromirror Array Temperature Calculation based on powerGo
  • Updated Figure 22Go
  • Removed link to DLP Discovery 4100 chipset datasheetGo
  • Added DLPR410 to Related Links tableGo

Changes from C Revision (April 2014) to D Revision

Changes from B Revision (June 2013) to C Revision

  • Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Deleted / DLPR4101 Enhanced PROM from Chipset ListGo
  • Corrected VCC2 max to 8 V Go
  • Added array temperature vs duty cycle graphGo
  • Replaced serial communications bus timing parametersGo
  • Converted interface loads to NewtonsGo
  • Grayed out LVDS buses that are unused on DLP7000Go
  • Added micromirror landed duty cycle sectionGo
  • Changed to DLP7000Go
  • Deleted / DLPR4101 Enhanced PROM from Related DocumentationGo

Changes from A Revision (September 2012) to B Revision

  • Added / DLPR4101 Enhanced PROM to DLPR410 in Chipset ListGo
  • Changed pin number of DCLK_AN From: D19 To: B22 Go
  • Changed pin number of DCLK_AP From: E19 To: B24 Go
  • Changed pin number of DCLK_BN From: M19 To: AB22 Go
  • Changed pin number of DCLK_BP From: N19 To: AB24 Go
  • Added / DLPR4101 Enhanced PROM to DLPR410 in Related DocumentationGo

Changes from * Revision (August 2012) to A Revision

  • Changed the device from 'Product Preview' to 'Production'Go