DLPS052 October   2015 DLPA3000

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Block Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Parameters
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply and Monitoring
        1. 7.3.1.1 Supply
        2. 7.3.1.2 Monitoring
          1. 7.3.1.2.1 Block Faults
          2. 7.3.1.2.2 Low Battery and UVLO
          3. 7.3.1.2.3 Auto LED Turn Off Functionality
          4. 7.3.1.2.4 Thermal Protection
      2. 7.3.2 Illumination
        1. 7.3.2.1 Programmable Gain Block
        2. 7.3.2.2 LDO Illum
        3. 7.3.2.3 Illumination Driver A
        4. 7.3.2.4 RGB Strobe Decoder
          1. 7.3.2.4.1 Break Before Make (BBM)
          2. 7.3.2.4.2 Openloop Voltage
          3. 7.3.2.4.3 Transient Current Limit
        5. 7.3.2.5 Illumination Monitoring
          1. 7.3.2.5.1 Power Good
          2. 7.3.2.5.2 Ratio Metric Overvoltage Protection
        6. 7.3.2.6 Load Current and Supply Voltage
        7. 7.3.2.7 Illumination Driver Plus Power FETS Efficiency
      3. 7.3.3 DMD Supplies
        1. 7.3.3.1 LDO DMD
        2. 7.3.3.2 DMD HV Regulator
          1. 7.3.3.2.1 Power-Up and Power-Down Timing
        3. 7.3.3.3 DMD/DLPC Buck Converters
        4. 7.3.3.4 DMD Monitoring
          1. 7.3.3.4.1 Power Good
          2. 7.3.3.4.2 Overvoltage Fault
      4. 7.3.4 Buck Converters
        1. 7.3.4.1 LDO Bucks
        2. 7.3.4.2 General Purpose Buck Converters
        3. 7.3.4.3 Buck Converter Monitoring
          1. 7.3.4.3.1 Power Good
          2. 7.3.4.3.2 Overvoltage Fault
        4. 7.3.4.4 Buck Converter Efficiency
      5. 7.3.5 Auxiliary LDOs
      6. 7.3.6 Measurement System
      7. 7.3.7 Digital Control
        1. 7.3.7.1 SPI
        2. 7.3.7.2 Interrupt
        3. 7.3.7.3 Fast-Shutdown in Case of Fault
        4. 7.3.7.4 Protected Registers
        5. 7.3.7.5 Writing to EEPROM
    4. 7.4 Device Functional Modes
    5. 7.5 Register Maps
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Setup Using DLPA3000
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Typical Application with DLPA3000 Internal Block Diagram
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 SPI Connections
    4. 10.4 RLIM Routing
    5. 10.5 LED Connection
    6. 10.6 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

Thermal Information

THERMAL METRIC(1) DLPA3000 UNIT
HTQFP (PFD)
100 PINS
RθJA Junction-to-ambient thermal resistance (2) 7.0 °C/W
RθJC(top) Junction-to-case (top) thermal resistance (3) 0.7 °C/W
ψJT Junction-to-top characterization parameter (4) 0.6 °C/W
ψJB Junction-to-board characterization parameter (5) 3.4 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, but since the device is intended to be cooled with a heatsink from the top case of the package, the simulation includes a fan and heatsink attached to the DLPA3000. The heatsink is a 22 mm × 22 mm × 12 mm aluminum pin fin heatsink with a 12 × 12 × 3 mm stud. Base thickness is 2 mm and pin diameter is 1.5 mm with an array of 6 × 6 pins. The heatsink is attached to the DLPA3000 with 100 um thick thermal grease with 3 W/m-K thermal conductivity. The fan is 20 × 20 × 8 mm with 1.6 cfm open volume flow rate and 0.22 in. water pressure at stagnation.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7), but modified to include the fan and heatsink described in note 2.
The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7), but modified to include the fan and heatsink described in note 2.