10.1.2 Reference Clock Layout
The DLPC34xx controller requires an external reference clock to feed the internal PLL. Use either a crystal or oscillator to supply this reference. The DLPC34xx reference clock must not exceed a frequency variation of ±200 ppm (including aging, temperature, and trim component variation).
Figure 33 shows the required discrete components when using a crystal.
CL = Crystal load capacitance (farads)
CL1 = 2 × (CL – Cstray_pll_refclk_i)
CL2 = 2 × (CL – Cstray_pll_refclk_o)
Figure 33. Required Discrete Components
- Cstray_pll_refclk_i = Sum of package and PCB stray capacitance at the crystal pin associated with the controller pin pll_refclk_i.
- Cstray_pll_refclk_o = Sum of package and PCB stray capacitance at the crystal pin associated with the controller pin pll_refclk_o.