|RθJC (1)||Junction-to-case thermal resistance||4.4||°C/W|
|RθJA at 0 m/s of forced airflow (2)||Junction-to-air thermal resistance||14.4||°C/W|
|RθJA at 1 m/s of forced airflow (2)||Junction-to-air thermal resistance||9.5||°C/W|
|RθJA at 2 m/s of forced airflow (2)||Junction-to-air thermal resistance||9.0||°C/W|
|φJT (3)||Temperature variance from junction to package top center temperature, per unit power dissipation||0.4||°C/W|
(1) RθJC analysis assumptions: The heat generated in the chip flows into overmold (top side) and also into the package laminate (bottom side) and then into PCB via package solder balls. Used for heat sink analysis only.
(2) Thermal coefficients abide by JEDEC Standard 51. RθJA is the thermal resistance of the package as measured using a JEDEC defined standard test PCB. This JEDEC test PCB is not necessarily representative of the DLPC900 PCB and thus the reported thermal resistance can be inaccurate in the actual product application. Although the actual thermal resistance can be different, it is the best information available during the design phase to estimate thermal performance.
(3) Example: (3.2 W) × (0.4 C/W) ≈ 1.28°C temperature rise.