6.6 Supply Voltage Requirements for Power-On Reset and Power-Down
(see (1))
|
MIN |
MAX |
UNIT |
tVCC |
VCCINT rise time from 0 V to nominal voltage (2) |
0.2 |
50 |
ms |
VCCPOR |
POR threshold for VCCINT supply |
0.5 |
– |
V |
tOER |
OE/RESET release delay following POR (3) |
0.5 |
30 |
ms |
VCCPD |
Power-down threshold for VCCINT supply |
|
0.5 |
V |
tRST |
Time required to trigger a device reset when the VCCINT supply drops below the maximum VCCPD threshold |
10 |
|
ms |
(1) VCCINT, VCCO, and VCCJ supplies can be applied in any order.
(2) At power up, the device requires the V
CCINT power supply to monotonically rise to the nominal operating voltage within the specified T
VCC rise time. If the power supply cannot meet this requirement, then the device might not perform power-on-reset properly. See Figure 6, in the Xilinx XCF16P (v2.19) Product Specification for more information.
(3) If the VCCINT and VCCO supplies do not reach their respective recommended operating conditions before the OE/RESET pin is released, then the configuration data from the PROM is not available at the recommended threshold levels. The configuration sequence must be delayed until both VCCINT and VCCO have reached their recommended operating conditions.