The DP83822 has several clock configuration options. An external crystal or CMOS-level oscillator provides the stimulus for the internal PHY reference clock. The local reference clock acts as the central source for all clocking within the device, excluding the pass-through clock option.
All clock configuration options are enabled using the DP83822 IO MUX GPIO Control Register #1 and #2 (IOCTRL1 IOCTRL2, address 0x0462 bits[14:12] for RX_D3 (GPIO3), address 0x0462 bits[6:4] for LED_1 (GPIO1), address 0x0463 bits[6:4] for COL (GPIO2)).
Clock options supported by the DP83822 include:
MAC IF Clock will operate at the same rate as the MAC interface selected. For MII operation, MAC IF Clock frequency is 25 MHz. For RMII operation, MAC IF Clock frequency is 50 MHz. For RGMII operation, MAC IF Clock frequency is 25 MHz. XI Clock is a pass-through option, which allows for the XI pin clock to be passed to a GPIO pin. Please note that the clock is buffered prior to transmission out of the GPIOs, and output clock amplitude will be at the selected VDDIO level. Free-Running Clock is an internally generated 125-MHz free-running clock. Recovered Clock is a 125-MHz recovered clock from a connected link partner.