9.6.1.27 GEN_CTRL Register (Address = 0x1F) [reset = 0x0]
GEN_CTRL is shown in Figure 59 and described in Table 47.
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Figure 59. GEN_CTRL Register
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
SW_RESET |
SW_RESTART |
RESERVED |
RESERVED |
RH/WtoP-0x0 |
RH/WtoP-0x0 |
R/W-0x0 |
R/W-0x0 |
|
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
RESERVED |
RESERVED |
R/W-0x0 |
R/W-0x0 |
|
Table 47. GEN_CTRL Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
15 |
SW_RESET |
RH/WtoP |
0x0 |
Software Reset This will reset the PHY and return registers to their default values. Registers controlled via strap pins will return back to their last strapped values.
0x0 = Normal mode
0x1 = Reset PHY
|
14 |
SW_RESTART |
RH/WtoP |
0x0 |
Soft Restart Restarts the PHY without affecting registers.
0x0 = Normal Operation
0x1 = Software Reset
|
13 |
RESERVED |
R/W |
0x0 |
Reserved
|
12-7 |
RESERVED |
R/W |
0x0 |
Reserved
|
6-0 |
RESERVED |
R/W |
0x0 |
Reserved
|