SNLS614A September 2018 – December 2018 DP83869HM
The DP83869HM can be configured to generate an interrupt when changes of internal status occur. The interrupt allows a MAC to act upon the status in the PHY without polling the PHY registers. The interrupt source can be selected through the interrupt registers, MICR (0x0012) and FIBER_INT_EN (0x0C18). The interrupt status can be read from ISR (0x0013) and FIBER_INT_STTS (0x0C19) registers. Some interrupts are enabled by default and can be disabled through register access. Both the interrupt status registers must be read in order to clear pending interrupts. Until the pending interrupts are cleared, new interrupts may not be routed to the interrupt pin.