SNLS614A September 2018 – December 2018 DP83869HM
MII Loopback is the shallowest loop through the PHY. It is a useful test mode to validate communications between the MAC and the PHY. While in MII Loopback mode, the data is looped back and can be configured through the register to transmit onto the media. In 100Base-TX mode after MII loopback is enabled through register 0x00, it is necessary to write 0x0004 to register 0x16 for proper operation of MII Loopback.