Refer to the PDF data sheet for device specific package drawings
The voltage input to the DPLLs has a low noise requirement. Board designs should supply these voltage inputs with a low noise LDO to ensure they are isolated from any potential digital switching noise. The TPS65919 PMIC LDOLN output is specifically designed to meet this low noise requirement.
For more information about Input Voltage Sources, see Section 18.104.22.168DPLLs, DLLs Specifications.
Table 7-6 presents the voltage inputs that supply the DPLLs.
|vdda_per||DPLL_PER and PER HSDIVIDER analog power supply|
|vdda_ddr||DPLL_DDR and DDR HSDIVIDER analog power supply|
|vdda_debug||DPLL_DEBUG analog power supply|
|vdda_core_gmac||DPLL_CORE and HSDIVIDER analog power supply|
|vdda_gpu||DPLL_GPU analog power supply|
|vdda_video||DPLL_VIDEO1 analog power supply|
|vdda_mpu_abe||DPLL_MPU and DPLL_ABE analog power supply|
|vdda_osc||not DPLL input but is required to be supplied by low noise input voltage|
|vdda_dsp_iva||DSP PLL and IVA PLL analog power supply|