7.15 Universal Asynchronous Receiver Transmitter (UART)
The UART performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. There are 10 UART modules in the device. Only one UART supports IrDA features. Each UART can be used for configuration and data exchange with a number of external peripheral devices or interprocessor communication between devices
The UARTi (where i = 1 to 10) include the following features:
- 16C750 compatibility
- 64-byte FIFO buffer for receiver and 64-byte FIFO for transmitter
- Baud generation based on programmable divisors N (where N = 1…16 384) operating from a fixed functional clock of 48 MHz or 192 MHz
- Break character detection and generation
- Configurable data format:
- Data bit: 5, 6, 7, or 8 bits
- Parity bit: Even, odd, none
- Stop-bit: 1, 1.5, 2 bit(s)
- Flow control: Hardware (RTS/CTS) or software (XON/XOFF)
- Only UART1 module has extended modem control signals (CD, RI, DTR, DSR)
- Only UART3 supports IrDA
For more information, see UART/IrDA/CIR section in the device TRM.
Table 7-40, Table 7-41 and Figure 7-32 assume testing over the recommended operating conditions and electrical characteristic conditions below.