SPRS968F August 2016 – November 2019 DRA790 , DRA791 , DRA793 , DRA797
Refer to the PDF data sheet for device specific package drawings
Table 5-28 summarizes the DLL characteristics and assumes testing over recommended operating conditions.
|finput||Input clock frequency (EMIF_DLL_FCLK)||333||MHz|
|trelock||Relock time (a change of the DLL frequency implies that DLL must relock)||50k||cycles|